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adam.huang
Arm Trusted Firmware
Commits
64b8db7e
Commit
64b8db7e
authored
Jun 22, 2021
by
Mark Dykes
Committed by
TrustedFirmware Code Review
Jun 22, 2021
Browse files
Merge "refactor(dt-bindings): align irq bindings with kernel" into integration
parents
967344b5
f1b6b014
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docs/license.rst
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64b8db7e
...
@@ -81,6 +81,7 @@ license text is included in those source files.
...
@@ -81,6 +81,7 @@ license text is included in those source files.
terms of the MIT license. These files are:
terms of the MIT license. These files are:
- ``include/dt-bindings/interrupt-controller/arm-gic.h``
- ``include/dt-bindings/interrupt-controller/arm-gic.h``
- ``include/dt-bindings/interrupt-controller/irq.h``
See the original `Linux MIT license`_.
See the original `Linux MIT license`_.
...
...
include/dt-bindings/interrupt-controller/arm-gic.h
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64b8db7e
/*
/*
* Copyright (c) 2019-2021, A
RM
Limited and Contributors. All rights reserved.
* Copyright (c) 2019-2021, A
rm
Limited and Contributors. All rights reserved.
*
*
* SPDX-License-Identifier: MIT
* SPDX-License-Identifier: MIT
*
*
...
@@ -9,21 +9,18 @@
...
@@ -9,21 +9,18 @@
#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H
#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H
#define _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H
#define _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H
#include <dt-bindings/interrupt-controller/irq.h>
/* interrupt specifier cell 0 */
/* interrupt specifier cell 0 */
#define GIC_SPI 0
#define GIC_SPI 0
#define GIC_PPI 1
#define GIC_PPI 1
#define IRQ_TYPE_NONE 0
#define IRQ_TYPE_EDGE_RISING 1
#define IRQ_TYPE_EDGE_FALLING 2
#define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)
#define IRQ_TYPE_LEVEL_HIGH 4
#define IRQ_TYPE_LEVEL_LOW 8
/*
/*
* Interrupt specifier cell 2.
* Interrupt specifier cell 2.
* The flags in irq.h are valid, plus those below.
*/
*/
#define GIC_CPU_MASK_RAW(x) ((x) << 8)
#define GIC_CPU_MASK_RAW(x) ((x) << 8)
#define GIC_CPU_MASK_SIMPLE(num) GIC_CPU_MASK_RAW((1 << (num)) - 1)
#endif
#endif
include/dt-bindings/interrupt-controller/irq.h
0 → 100644
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64b8db7e
/*
* Copyright (c) 2021, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: MIT
*
* This header provides constants for most IRQ bindings.
*
* Most IRQ bindings include a flags cell as part of the IRQ specifier.
* In most cases, the format of the flags cell uses the standard values
* defined in this header.
*/
#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_IRQ_H
#define _DT_BINDINGS_INTERRUPT_CONTROLLER_IRQ_H
#define IRQ_TYPE_NONE 0
#define IRQ_TYPE_EDGE_RISING 1
#define IRQ_TYPE_EDGE_FALLING 2
#define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)
#define IRQ_TYPE_LEVEL_HIGH 4
#define IRQ_TYPE_LEVEL_LOW 8
#endif
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