allwinner: Reenable USE_COHERENT_MEM

Now that there is plenty of space (32 KiB) available for NOBITS
sections, we can afford using an entire page for coherent memory. In
fact, because it simplifies the code, this is a beneficial change for
loaded image (.text) size, where we are still close to the size limit.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Change-Id: I0b899dabcb162015c63b0e4aed0869569c889ed9

plat/allwinner/common/allwinner-common.mk

@@ -61,8 +61,5 @@ SEPARATE_NOBITS_REGION		:=	1
 # BL31 gets loaded alongside BL33 (U-Boot) by U-Boot's SPL
 RESET_TO_BL31			:=	1
 
-# We are short on memory, so save 3.5KB by not having an extra coherent page.
-USE_COHERENT_MEM		:=	0
-
 # This platform is single-cluster and does not require coherency setup.
 WARMBOOT_ENABLE_DCACHE_EARLY	:=	1

plat/allwinner/common/include/platform_def.h

@@ -32,7 +32,7 @@
 #define CACHE_WRITEBACK_SHIFT		6
 #define CACHE_WRITEBACK_GRANULE		(1 << CACHE_WRITEBACK_SHIFT)
 
-#define MAX_MMAP_REGIONS		(3 + PLATFORM_MMAP_REGIONS)
+#define MAX_MMAP_REGIONS		(4 + PLATFORM_MMAP_REGIONS)
 #define MAX_XLAT_TABLES			1
 
 #define PLAT_MAX_PWR_LVL_STATES		U(2)

plat/allwinner/common/sunxi_common.c

@@ -57,6 +57,10 @@ void sunxi_configure_mmu_el3(int flags)
 	mmap_add_region(BL_RO_DATA_BASE, BL_RO_DATA_BASE,
 			BL_RO_DATA_END - BL_RO_DATA_BASE,
 			MT_RO_DATA | MT_SECURE);
+	mmap_add_region(BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_BASE,
+			BL_COHERENT_RAM_END - BL_COHERENT_RAM_BASE,
+			MT_DEVICE | MT_RW | MT_SECURE | MT_EXECUTE_NEVER);
+
 	mmap_add(sunxi_mmap);
 	init_xlat_tables();