Commit 6cdef9ba authored by Deepika Bhavnani's avatar Deepika Bhavnani
Browse files

xilinx: Unify Platform specific defines for PSCI module



PLATFORM_CORE_COUNT - Unsigned int
PLATFORM_CLUSTER_COUNT - Unsigned int
PLATFORM_MAX_CPUS_PER_CLUSTER - Unsigned int
PLATFORM_CORE_COUNT_PER_CLUSTER - Unsigned int
Signed-off-by: default avatarDeepika Bhavnani <deepika.bhavnani@arm.com>
Change-Id: I76f5535f1cbdaf3fc1235cd824111d9afe8f7e1b
parent b2534079
...@@ -17,7 +17,7 @@ ...@@ -17,7 +17,7 @@
/* Size of cacheable stacks */ /* Size of cacheable stacks */
#define PLATFORM_STACK_SIZE 0x440 #define PLATFORM_STACK_SIZE 0x440
#define PLATFORM_CORE_COUNT 2 #define PLATFORM_CORE_COUNT U(2)
#define PLAT_MAX_PWR_LVL 1 #define PLAT_MAX_PWR_LVL 1
#define PLAT_MAX_RET_STATE 1 #define PLAT_MAX_RET_STATE 1
#define PLAT_MAX_OFF_STATE 2 #define PLAT_MAX_OFF_STATE 2
......
/* /*
* Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2014-2020, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
...@@ -21,8 +21,8 @@ ...@@ -21,8 +21,8 @@
/* Size of cacheable stacks */ /* Size of cacheable stacks */
#define PLATFORM_STACK_SIZE 0x440 #define PLATFORM_STACK_SIZE 0x440
#define PLATFORM_CORE_COUNT 4 #define PLATFORM_CORE_COUNT U(4)
#define PLAT_NUM_POWER_DOMAINS 5 #define PLAT_NUM_POWER_DOMAINS U(5)
#define PLAT_MAX_PWR_LVL U(1) #define PLAT_MAX_PWR_LVL U(1)
#define PLAT_MAX_RET_STATE U(1) #define PLAT_MAX_RET_STATE U(1)
#define PLAT_MAX_OFF_STATE U(2) #define PLAT_MAX_OFF_STATE U(2)
......
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