MISRA fixes for AMU/SPE and SVE

Change-Id: I38470528111410cf12b187eb1397d87b812c9416
Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>

lib/extensions/amu/aarch32/amu.c

@@ -30,7 +30,7 @@ int amu_supported(void)
 
 void amu_enable(int el2_unused)
 {
-	if (!amu_supported())
+	if (amu_supported() == 0)
 		return;
 
 	if (el2_unused) {
@@ -54,7 +54,7 @@ void amu_enable(int el2_unused)
 /* Read the group 0 counter identified by the given `idx`. */
 uint64_t amu_group0_cnt_read(int idx)
 {
-	assert(amu_supported());
+	assert(amu_supported() != 0);
 	assert(idx >= 0 && idx < AMU_GROUP0_NR_COUNTERS);
 
 	return amu_group0_cnt_read_internal(idx);
@@ -63,7 +63,7 @@ uint64_t amu_group0_cnt_read(int idx)
 /* Write the group 0 counter identified by the given `idx` with `val`. */
 void amu_group0_cnt_write(int idx, uint64_t val)
 {
-	assert(amu_supported());
+	assert(amu_supported() != 0);
 	assert(idx >= 0 && idx < AMU_GROUP0_NR_COUNTERS);
 
 	amu_group0_cnt_write_internal(idx, val);
@@ -73,7 +73,7 @@ void amu_group0_cnt_write(int idx, uint64_t val)
 /* Read the group 1 counter identified by the given `idx`. */
 uint64_t amu_group1_cnt_read(int idx)
 {
-	assert(amu_supported());
+	assert(amu_supported() != 0);
 	assert(idx >= 0 && idx < AMU_GROUP1_NR_COUNTERS);
 
 	return amu_group1_cnt_read_internal(idx);
@@ -82,7 +82,7 @@ uint64_t amu_group1_cnt_read(int idx)
 /* Write the group 1 counter identified by the given `idx` with `val`. */
 void amu_group1_cnt_write(int idx, uint64_t val)
 {
-	assert(amu_supported());
+	assert(amu_supported() != 0);
 	assert(idx >= 0 && idx < AMU_GROUP1_NR_COUNTERS);
 
 	amu_group1_cnt_write_internal(idx, val);
@@ -91,7 +91,7 @@ void amu_group1_cnt_write(int idx, uint64_t val)
 
 void amu_group1_set_evtype(int idx, unsigned int val)
 {
-	assert(amu_supported());
+	assert(amu_supported() != 0);
 	assert(idx >= 0 && idx < AMU_GROUP1_NR_COUNTERS);
 
 	amu_group1_set_evtype_internal(idx, val);
@@ -103,7 +103,7 @@ static void *amu_context_save(const void *arg)
 	struct amu_ctx *ctx;
 	int i;
 
-	if (!amu_supported())
+	if (amu_supported() == 0)
 		return (void *)-1;
 
 	ctx = &amu_ctxs[plat_my_core_pos()];
@@ -132,11 +132,9 @@ static void *amu_context_save(const void *arg)
 static void *amu_context_restore(const void *arg)
 {
 	struct amu_ctx *ctx;
-	uint64_t features;
 	int i;
 
-	features = read_id_pfr0() >> ID_PFR0_AMU_SHIFT;
-	if ((features & ID_PFR0_AMU_MASK) != 1)
+	if (amu_supported() == 0)
 		return (void *)-1;
 
 	ctx = &amu_ctxs[plat_my_core_pos()];

lib/extensions/amu/aarch64/amu.c

@@ -37,7 +37,7 @@ void amu_enable(int el2_unused)
 {
 	uint64_t v;
 
-	if (!amu_supported())
+	if (amu_supported() == 0)
 		return;
 
 	if (el2_unused) {
@@ -67,7 +67,7 @@ void amu_enable(int el2_unused)
 /* Read the group 0 counter identified by the given `idx`. */
 uint64_t amu_group0_cnt_read(int idx)
 {
-	assert(amu_supported());
+	assert(amu_supported() != 0);
 	assert(idx >= 0 && idx < AMU_GROUP0_NR_COUNTERS);
 
 	return amu_group0_cnt_read_internal(idx);
@@ -76,7 +76,7 @@ uint64_t amu_group0_cnt_read(int idx)
 /* Write the group 0 counter identified by the given `idx` with `val`. */
 void amu_group0_cnt_write(int idx, uint64_t val)
 {
-	assert(amu_supported());
+	assert(amu_supported() != 0);
 	assert(idx >= 0 && idx < AMU_GROUP0_NR_COUNTERS);
 
 	amu_group0_cnt_write_internal(idx, val);
@@ -86,7 +86,7 @@ void amu_group0_cnt_write(int idx, uint64_t val)
 /* Read the group 1 counter identified by the given `idx`. */
 uint64_t amu_group1_cnt_read(int idx)
 {
-	assert(amu_supported());
+	assert(amu_supported() != 0);
 	assert(idx >= 0 && idx < AMU_GROUP1_NR_COUNTERS);
 
 	return amu_group1_cnt_read_internal(idx);
@@ -95,7 +95,7 @@ uint64_t amu_group1_cnt_read(int idx)
 /* Write the group 1 counter identified by the given `idx` with `val`. */
 void amu_group1_cnt_write(int idx, uint64_t val)
 {
-	assert(amu_supported());
+	assert(amu_supported() != 0);
 	assert(idx >= 0 && idx < AMU_GROUP1_NR_COUNTERS);
 
 	amu_group1_cnt_write_internal(idx, val);
@@ -108,7 +108,7 @@ void amu_group1_cnt_write(int idx, uint64_t val)
  */
 void amu_group1_set_evtype(int idx, unsigned int val)
 {
-	assert(amu_supported());
+	assert(amu_supported() != 0);
 	assert (idx >= 0 && idx < AMU_GROUP1_NR_COUNTERS);
 
 	amu_group1_set_evtype_internal(idx, val);
@@ -120,7 +120,7 @@ static void *amu_context_save(const void *arg)
 	struct amu_ctx *ctx = &amu_ctxs[plat_my_core_pos()];
 	int i;
 
-	if (!amu_supported())
+	if (amu_supported() == 0)
 		return (void *)-1;
 
 	/* Assert that group 0/1 counter configuration is what we expect */
@@ -154,7 +154,7 @@ static void *amu_context_restore(const void *arg)
 	struct amu_ctx *ctx = &amu_ctxs[plat_my_core_pos()];
 	int i;
 
-	if (!amu_supported())
+	if (amu_supported() == 0)
 		return (void *)-1;
 
 	/* Counters were disabled in `amu_context_save()` */

lib/extensions/spe/spe.c

@@ -26,7 +26,7 @@ void spe_enable(int el2_unused)
 {
 	uint64_t v;
 
-	if (!spe_supported())
+	if (spe_supported() == 0)
 		return;
 
 	if (el2_unused) {
@@ -58,7 +58,7 @@ void spe_disable(void)
 {
 	uint64_t v;
 
-	if (!spe_supported())
+	if (spe_supported() == 0)
 		return;
 
 	/* Drain buffered data */
@@ -74,7 +74,7 @@ void spe_disable(void)
 
 static void *spe_drain_buffers_hook(const void *arg)
 {
-	if (!spe_supported())
+	if (spe_supported() == 0)
 		return (void *)-1;
 
 	/* Drain buffered data */

lib/extensions/sve/sve.c

@@ -21,7 +21,7 @@ static void *disable_sve_hook(const void *arg)
 {
 	uint64_t cptr;
 
-	if (!sve_supported())
+	if (sve_supported() == 0)
 		return (void *)-1;
 
 	/*
@@ -46,7 +46,7 @@ static void *enable_sve_hook(const void *arg)
 {
 	uint64_t cptr;
 
-	if (!sve_supported())
+	if (sve_supported() == 0)
 		return (void *)-1;
 
 	/*
@@ -67,7 +67,7 @@ void sve_enable(int el2_unused)
 {
 	uint64_t cptr;
 
-	if (!sve_supported())
+	if (sve_supported() == 0)
 		return;
 
 #if CTX_INCLUDE_FPREGS