Commit 772b6e27 authored by Jon Medhurst's avatar Jon Medhurst Committed by Sandrine Bailleux
Browse files

juno: Use static declaration of bl31_args



Juno doesn't have TZDRAM as FVP does, and there is real reason why we
need a special memory region for bl31_args anyway, assuming we take care
to copy it in BL31 before BL2's memory is reused.
Signed-off-by: default avatarJon Medhurst <tixy@linaro.org>
parent 7ec0b590
...@@ -71,24 +71,18 @@ static meminfo bl2_tzram_layout ...@@ -71,24 +71,18 @@ static meminfo bl2_tzram_layout
__attribute__ ((aligned(PLATFORM_CACHE_LINE_SIZE), __attribute__ ((aligned(PLATFORM_CACHE_LINE_SIZE),
section("tzfw_coherent_mem"))); section("tzfw_coherent_mem")));
/******************************************************************************* static bl31_args bl2_to_bl31_args
* Reference to structure which holds the arguments which need to be passed __attribute__ ((aligned(PLATFORM_CACHE_LINE_SIZE),
* to BL31 section("tzfw_coherent_mem")));
******************************************************************************/
static bl31_args *bl2_to_bl31_args;
meminfo *bl2_plat_sec_mem_layout(void) meminfo *bl2_plat_sec_mem_layout(void)
{ {
return &bl2_tzram_layout; return &bl2_tzram_layout;
} }
/*******************************************************************************
* This function returns a pointer to the memory that the platform has kept
* aside to pass all the information that BL31 could need.
******************************************************************************/
bl31_args *bl2_get_bl31_args_ptr(void) bl31_args *bl2_get_bl31_args_ptr(void)
{ {
return bl2_to_bl31_args; return &bl2_to_bl31_args;
} }
/******************************************************************************* /*******************************************************************************
...@@ -118,16 +112,14 @@ void bl2_platform_setup() ...@@ -118,16 +112,14 @@ void bl2_platform_setup()
{ {
/* Initialise the IO layer and register platform IO devices */ /* Initialise the IO layer and register platform IO devices */
io_setup(); io_setup();
/* Use the Trusted DRAM for passing args to BL31 */
bl2_to_bl31_args = (bl31_args *) TZDRAM_BASE;
/* Populate the extents of memory available for loading BL33 */ /* Populate the extents of memory available for loading BL33 */
bl2_to_bl31_args->bl33_meminfo.total_base = DRAM_BASE; bl2_to_bl31_args.bl33_meminfo.total_base = DRAM_BASE;
bl2_to_bl31_args->bl33_meminfo.total_size = DRAM_SIZE; bl2_to_bl31_args.bl33_meminfo.total_size = DRAM_SIZE;
bl2_to_bl31_args->bl33_meminfo.free_base = DRAM_BASE; bl2_to_bl31_args.bl33_meminfo.free_base = DRAM_BASE;
bl2_to_bl31_args->bl33_meminfo.free_size = DRAM_SIZE; bl2_to_bl31_args.bl33_meminfo.free_size = DRAM_SIZE;
bl2_to_bl31_args->bl33_meminfo.attr = 0; bl2_to_bl31_args.bl33_meminfo.attr = 0;
bl2_to_bl31_args->bl33_meminfo.next = 0; bl2_to_bl31_args.bl33_meminfo.next = 0;
} }
......
...@@ -61,20 +61,16 @@ extern unsigned long __COHERENT_RAM_END__; ...@@ -61,20 +61,16 @@ extern unsigned long __COHERENT_RAM_END__;
#define BL31_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__) #define BL31_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
#define BL31_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__) #define BL31_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
/******************************************************************************* static bl31_args bl2_to_bl31_args;
* Reference to structure which holds the arguments that have been passed to
* BL31 from BL2.
******************************************************************************/
static bl31_args *bl2_to_bl31_args;
meminfo *bl31_plat_sec_mem_layout(void) meminfo *bl31_plat_sec_mem_layout(void)
{ {
return &bl2_to_bl31_args->bl31_meminfo; return &bl2_to_bl31_args.bl31_meminfo;
} }
meminfo *bl31_plat_get_bl32_mem_layout(void) meminfo *bl31_plat_get_bl32_mem_layout(void)
{ {
return &bl2_to_bl31_args->bl32_meminfo; return &bl2_to_bl31_args.bl32_meminfo;
} }
/******************************************************************************* /*******************************************************************************
...@@ -88,8 +84,8 @@ el_change_info *bl31_get_next_image_info(uint32_t type) ...@@ -88,8 +84,8 @@ el_change_info *bl31_get_next_image_info(uint32_t type)
el_change_info *next_image_info; el_change_info *next_image_info;
next_image_info = (type == NON_SECURE) ? next_image_info = (type == NON_SECURE) ?
&bl2_to_bl31_args->bl33_image_info : &bl2_to_bl31_args.bl33_image_info :
&bl2_to_bl31_args->bl32_image_info; &bl2_to_bl31_args.bl32_image_info;
/* None of the images on this platform can have 0x0 as the entrypoint */ /* None of the images on this platform can have 0x0 as the entrypoint */
if (next_image_info->entrypoint) if (next_image_info->entrypoint)
...@@ -112,8 +108,7 @@ el_change_info *bl31_get_next_image_info(uint32_t type) ...@@ -112,8 +108,7 @@ el_change_info *bl31_get_next_image_info(uint32_t type)
void bl31_early_platform_setup(bl31_args *from_bl2, void bl31_early_platform_setup(bl31_args *from_bl2,
void *data) void *data)
{ {
bl2_to_bl31_args = from_bl2; bl2_to_bl31_args = *from_bl2;
} }
/******************************************************************************* /*******************************************************************************
...@@ -145,7 +140,7 @@ void bl31_platform_setup() ...@@ -145,7 +140,7 @@ void bl31_platform_setup()
******************************************************************************/ ******************************************************************************/
void bl31_plat_arch_setup() void bl31_plat_arch_setup()
{ {
configure_mmu(&bl2_to_bl31_args->bl31_meminfo, configure_mmu(&bl2_to_bl31_args.bl31_meminfo,
BL31_RO_BASE, BL31_RO_BASE,
BL31_RO_LIMIT, BL31_RO_LIMIT,
BL31_COHERENT_RAM_BASE, BL31_COHERENT_RAM_BASE,
......
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