Merge pull request #1628 from antonio-nino-diaz-arm/an/sharing

plat/arm: Small reorganization of platform code

include/plat/arm/board/common/board_arm_def.h

-/*
- * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-#ifndef __BOARD_ARM_DEF_H__
-#define __BOARD_ARM_DEF_H__
-
-#include <v2m_def.h>
-
-/*
- * Required platform porting definitions common to all ARM
- * development platforms
- */
-
-/* Size of cacheable stacks */
-#if defined(IMAGE_BL1)
-#if TRUSTED_BOARD_BOOT
-# define PLATFORM_STACK_SIZE 0x1000
-#else
-# define PLATFORM_STACK_SIZE 0x440
-#endif
-#elif defined(IMAGE_BL2)
-# if TRUSTED_BOARD_BOOT
-#  define PLATFORM_STACK_SIZE 0x1000
-# else
-#  define PLATFORM_STACK_SIZE 0x400
-# endif
-#elif defined(IMAGE_BL2U)
-# define PLATFORM_STACK_SIZE 0x400
-#elif defined(IMAGE_BL31)
-#if ENABLE_SPM
-# define PLATFORM_STACK_SIZE 0x500
-#elif PLAT_XLAT_TABLES_DYNAMIC
-# define PLATFORM_STACK_SIZE 0x800
-#else
-# define PLATFORM_STACK_SIZE 0x400
-#endif
-#elif defined(IMAGE_BL32)
-# define PLATFORM_STACK_SIZE 0x440
-#endif
-
-#define MAX_IO_DEVICES			3
-#define MAX_IO_HANDLES			4
-
-#define PLAT_ARM_TRUSTED_SRAM_SIZE	0x00040000	/* 256 KB */
-
-/* Reserve the last block of flash for PSCI MEM PROTECT flag */
-#define PLAT_ARM_FIP_BASE		V2M_FLASH0_BASE
-#define PLAT_ARM_FIP_MAX_SIZE		(V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE)
-
-#define PLAT_ARM_NVM_BASE		V2M_FLASH0_BASE
-#define PLAT_ARM_NVM_SIZE		(V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE)
-
-/*
- * Map mem_protect flash region with read and write permissions
- */
-#define ARM_V2M_MAP_MEM_PROTECT		MAP_REGION_FLAT(PLAT_ARM_MEM_PROT_ADDR,	\
-						V2M_FLASH_BLOCK_SIZE,		\
-						MT_DEVICE | MT_RW | MT_SECURE)
-
-#endif /* __BOARD_ARM_DEF_H__ */

include/plat/arm/board/common/board_css_def.h

@@ -40,6 +40,16 @@
 #endif /* __ASSEMBLY__ */
 
 
+#define MAX_IO_DEVICES			3
+#define MAX_IO_HANDLES			4
+
+/* Reserve the last block of flash for PSCI MEM PROTECT flag */
+#define PLAT_ARM_FIP_BASE		V2M_FLASH0_BASE
+#define PLAT_ARM_FIP_MAX_SIZE		(V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE)
+
+#define PLAT_ARM_NVM_BASE		V2M_FLASH0_BASE
+#define PLAT_ARM_NVM_SIZE		(V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE)
+
 /*
  * Required platform porting definitions common to all ARM CSS-based
  * development platforms
@@ -63,6 +73,5 @@
 #define PLAT_ARM_TSP_UART_BASE			V2M_IOFPGA_UART0_BASE
 #define PLAT_ARM_TSP_UART_CLK_IN_HZ		V2M_IOFPGA_UART0_CLK_IN_HZ
 
-
 #endif /* __BOARD_CSS_DEF_H__ */
 

include/plat/arm/common/arm_def.h

@@ -276,6 +276,13 @@
 						MT_MEMORY | MT_RW | MT_SECURE)
 #endif
 
+/*
+ * Map mem_protect flash region with read and write permissions
+ */
+#define ARM_V2M_MAP_MEM_PROTECT		MAP_REGION_FLAT(PLAT_ARM_MEM_PROT_ADDR,	\
+						V2M_FLASH_BLOCK_SIZE,		\
+						MT_DEVICE | MT_RW | MT_SECURE)
+
 /*
  * The max number of regions like RO(code), coherent and data required by
  * different BL stages which need to be mapped in the MMU.

plat/arm/board/common/board_css.mk

-#
-# Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
-#
-# SPDX-License-Identifier: BSD-3-Clause
-#
-
-PLAT_BL_COMMON_SOURCES	+=	plat/arm/board/common/board_css_common.c
-
-include plat/arm/board/common/board_common.mk

plat/arm/board/fvp/include/platform_def.h

@@ -20,7 +20,6 @@
 
 #include <arm_def.h>
 #include <arm_spm_def.h>
-#include <board_arm_def.h>
 #include <common_def.h>
 #include <tzc400.h>
 #include <utils_def.h>
@@ -45,6 +44,8 @@
  */
 #define PLAT_ARM_CLUSTER_COUNT		FVP_CLUSTER_COUNT
 
+#define PLAT_ARM_TRUSTED_SRAM_SIZE	0x00040000	/* 256 KB */
+
 #define PLAT_ARM_TRUSTED_ROM_BASE	0x00000000
 #define PLAT_ARM_TRUSTED_ROM_SIZE	0x04000000	/* 64 MB */
 
@@ -133,6 +134,45 @@
 # define PLAT_ARM_MAX_BL32_SIZE		0x3B000
 #endif
 
+/*
+ * Size of cacheable stacks
+ */
+#if defined(IMAGE_BL1)
+# if TRUSTED_BOARD_BOOT
+#  define PLATFORM_STACK_SIZE 0x1000
+# else
+#  define PLATFORM_STACK_SIZE 0x440
+# endif
+#elif defined(IMAGE_BL2)
+# if TRUSTED_BOARD_BOOT
+#  define PLATFORM_STACK_SIZE 0x1000
+# else
+#  define PLATFORM_STACK_SIZE 0x400
+# endif
+#elif defined(IMAGE_BL2U)
+# define PLATFORM_STACK_SIZE 0x400
+#elif defined(IMAGE_BL31)
+# if ENABLE_SPM
+#  define PLATFORM_STACK_SIZE 0x500
+# elif PLAT_XLAT_TABLES_DYNAMIC
+#  define PLATFORM_STACK_SIZE 0x800
+# else
+#  define PLATFORM_STACK_SIZE 0x400
+# endif
+#elif defined(IMAGE_BL32)
+# define PLATFORM_STACK_SIZE 0x440
+#endif
+
+#define MAX_IO_DEVICES			3
+#define MAX_IO_HANDLES			4
+
+/* Reserve the last block of flash for PSCI MEM PROTECT flag */
+#define PLAT_ARM_FIP_BASE		V2M_FLASH0_BASE
+#define PLAT_ARM_FIP_MAX_SIZE		(V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE)
+
+#define PLAT_ARM_NVM_BASE		V2M_FLASH0_BASE
+#define PLAT_ARM_NVM_SIZE		(V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE)
+
 /*
  * PL011 related constants
  */

plat/arm/board/juno/include/platform_def.h

@@ -20,7 +20,6 @@
 
 
 #include <arm_def.h>
-#include <board_arm_def.h>
 #include <board_css_def.h>
 #include <common_def.h>
 #include <css_def.h>
@@ -53,6 +52,8 @@
  */
 #define PLAT_ARM_CLUSTER_COUNT		JUNO_CLUSTER_COUNT
 
+#define PLAT_ARM_TRUSTED_SRAM_SIZE	0x00040000	/* 256 KB */
+
 /* Use the bypass address */
 #define PLAT_ARM_TRUSTED_ROM_BASE	V2M_FLASH0_BASE + BL1_ROM_BYPASS_OFFSET
 
@@ -162,6 +163,33 @@
 #define PLAT_ARM_MAX_BL32_SIZE		0x3E000
 #endif
 
+/*
+ * Size of cacheable stacks
+ */
+#if defined(IMAGE_BL1)
+# if TRUSTED_BOARD_BOOT
+#  define PLATFORM_STACK_SIZE 0x1000
+# else
+#  define PLATFORM_STACK_SIZE 0x440
+# endif
+#elif defined(IMAGE_BL2)
+# if TRUSTED_BOARD_BOOT
+#  define PLATFORM_STACK_SIZE 0x1000
+# else
+#  define PLATFORM_STACK_SIZE 0x400
+# endif
+#elif defined(IMAGE_BL2U)
+# define PLATFORM_STACK_SIZE 0x400
+#elif defined(IMAGE_BL31)
+# if PLAT_XLAT_TABLES_DYNAMIC
+#  define PLATFORM_STACK_SIZE 0x800
+# else
+#  define PLATFORM_STACK_SIZE 0x400
+# endif
+#elif defined(IMAGE_BL32)
+# define PLATFORM_STACK_SIZE 0x440
+#endif
+
 /*
  * Since free SRAM space is scant, enable the ASSERTION message size
  * optimization by fixing the PLAT_LOG_LEVEL_ASSERT to LOG_LEVEL_INFO (40).

plat/arm/board/juno/platform.mk

@@ -29,7 +29,8 @@ CSS_USE_SCMI_SDS_DRIVER		:=	1
 PLAT_INCLUDES		:=	-Iplat/arm/board/juno/include		\
 				-Iplat/arm/css/drivers/sds
 
-PLAT_BL_COMMON_SOURCES	:=	plat/arm/board/juno/${ARCH}/juno_helpers.S
+PLAT_BL_COMMON_SOURCES	:=	plat/arm/board/juno/${ARCH}/juno_helpers.S \
+				plat/arm/board/juno/juno_common.c
 
 # Flag to enable support for AArch32 state on JUNO
 JUNO_AARCH32_EL3_RUNTIME	:=	0
@@ -123,7 +124,7 @@ SKIP_A57_L1_FLUSH_PWR_DWN	:=	 1
 # Do not enable SVE
 ENABLE_SVE_FOR_NS		:=	0
 
-include plat/arm/board/common/board_css.mk
+include plat/arm/board/common/board_common.mk
 include plat/arm/common/arm_common.mk
 include plat/arm/soc/common/soc_css.mk
 include plat/arm/css/common/css_common.mk

plat/arm/css/sgi/include/platform_def.h

@@ -9,12 +9,12 @@
 
 #include <arm_def.h>
 #include <arm_spm_def.h>
-#include <board_arm_def.h>
 #include <board_css_def.h>
 #include <common_def.h>
 #include <css_def.h>
 #include <soc_css_def.h>
 #include <utils_def.h>
+#include <v2m_def.h>
 #include <xlat_tables_defs.h>
 
 #define CSS_SGI_MAX_CPUS_PER_CLUSTER	4
@@ -26,6 +26,8 @@
 					CSS_SGI_MAX_CPUS_PER_CLUSTER * \
 					CSS_SGI_MAX_PE_PER_CPU)
 
+#define PLAT_ARM_TRUSTED_SRAM_SIZE	0x00040000	/* 256 KB */
+
 /*
  * PLAT_ARM_MMAP_ENTRIES depends on the number of entries in the
  * plat_arm_mmap array defined for each BL stage.
@@ -86,6 +88,34 @@
  */
 #define PLAT_ARM_MAX_BL31_SIZE		0x3B000
 
+/*
+ * Size of cacheable stacks
+ */
+#if defined(IMAGE_BL1)
+# if TRUSTED_BOARD_BOOT
+#  define PLATFORM_STACK_SIZE 0x1000
+# else
+#  define PLATFORM_STACK_SIZE 0x440
+# endif
+#elif defined(IMAGE_BL2)
+# if TRUSTED_BOARD_BOOT
+#  define PLATFORM_STACK_SIZE 0x1000
+# else
+#  define PLATFORM_STACK_SIZE 0x400
+# endif
+#elif defined(IMAGE_BL2U)
+# define PLATFORM_STACK_SIZE 0x400
+#elif defined(IMAGE_BL31)
+# if ENABLE_SPM
+#  define PLATFORM_STACK_SIZE 0x500
+# else
+#  define PLATFORM_STACK_SIZE 0x400
+# endif
+#elif defined(IMAGE_BL32)
+# define PLATFORM_STACK_SIZE 0x440
+#endif
+
+
 #define PLAT_ARM_NSTIMER_FRAME_ID	0
 
 #define PLAT_CSS_MHU_BASE		0x45000000

plat/arm/css/sgm/include/sgm_base_platform_def.h

@@ -8,13 +8,13 @@
 #define __SGM_BASE_PLATFORM_DEF_H__
 
 #include <arm_def.h>
-#include <board_arm_def.h>
 #include <board_css_def.h>
 #include <common_def.h>
 #include <css_def.h>
 #include <soc_css_def.h>
 #include <tzc400.h>
 #include <tzc_common.h>
+#include <v2m_def.h>
 
 /* CPU topology */
 #define PLAT_ARM_CLUSTER_COUNT		1
@@ -82,6 +82,8 @@
  * platforms
  *************************************************************************/
 
+#define PLAT_ARM_TRUSTED_SRAM_SIZE	0x00040000	/* 256 KB */
+
 /* MHU related constants */
 #define PLAT_CSS_MHU_BASE		0x2b1f0000
 
@@ -204,6 +206,29 @@
  */
 #define PLAT_ARM_MAX_BL31_SIZE		0x3B000
 
+/*
+ * Size of cacheable stacks
+ */
+#if defined(IMAGE_BL1)
+# if TRUSTED_BOARD_BOOT
+#  define PLATFORM_STACK_SIZE 0x1000
+# else
+#  define PLATFORM_STACK_SIZE 0x440
+# endif
+#elif defined(IMAGE_BL2)
+# if TRUSTED_BOARD_BOOT
+#  define PLATFORM_STACK_SIZE 0x1000
+# else
+#  define PLATFORM_STACK_SIZE 0x400
+# endif
+#elif defined(IMAGE_BL2U)
+# define PLATFORM_STACK_SIZE 0x400
+#elif defined(IMAGE_BL31)
+# define PLATFORM_STACK_SIZE 0x400
+#elif defined(IMAGE_BL32)
+# define PLATFORM_STACK_SIZE 0x440
+#endif
+
 /*******************************************************************************
  * Memprotect definitions
  ******************************************************************************/