Remove duplicate TZC-400 header file

Because we needed to configure the trustzone controller on Juno,
minimal support for the TZC-400 had been added. However, a proper
TZC-400 driver has been introduced since then. This patch removes
the old, minimal header file and makes the necessary changes to use
the new one.

Change-Id: I4af1d8fb423e3214a0020c527bd2c1c2fcdb5c56

drivers/arm/trustzone/tzc-400/tzc400.h

-/*
- * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * Neither the name of ARM nor the names of its contributors may be used
- * to endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef __TZC_400_H__
-#define __TZC_400_H__
-
-#define TZC400_GATE_KEEPER_REG			0x008
-#define TZC400_REGION_ATTRIBUTES_0_REG		0x110
-#define TZC400_REGION_ID_ACCESS_0_REG		0x114
-
-#define TZC400_NSAID_WR_EN	(1 << 16)
-#define TZC400_NSAID_RD_EN	(1 << 0)
-#define TZC400_NSAID_RD_RW	(TZC400_NSAID_WR_EN | TZC400_NSAID_RD_EN)
-
-#endif /* __TZC_400_H__ */

plat/juno/bl1_plat_setup.c

@@ -36,7 +36,7 @@
 #include <console.h>
 #include <mmio.h>
 #include <platform.h>
-#include "../../drivers/arm/trustzone/tzc-400/tzc400.h"
+#include <tzc400.h>
 
 /*******************************************************************************
  * Declarations of linker defined symbols which will help us find the layout
@@ -156,30 +156,30 @@ static void init_nic400(void)
 static void init_tzc400(void)
 {
 	/* Enable all filter units available */
-	mmio_write_32(TZC400_BASE + TZC400_GATE_KEEPER_REG, 0x0000000f);
+	mmio_write_32(TZC400_BASE + GATE_KEEPER_OFF, 0x0000000f);
 
 	/*
 	 * Secure read and write are enabled for region 0, and the background
 	 * region (region 0) is enabled for all four filter units
 	 */
-	mmio_write_32(TZC400_BASE + TZC400_REGION_ATTRIBUTES_0_REG, 0xc0000000);
+	mmio_write_32(TZC400_BASE + REGION_ATTRIBUTES_OFF, 0xc0000000);
 
 	/*
 	 * Enable Non-secure read/write accesses for the Soc Devices from the
 	 * Non-Secure World
 	 */
-	mmio_write_32(TZC400_BASE + TZC400_REGION_ID_ACCESS_0_REG,
-		(TZC400_NSAID_RD_RW << TZC400_NSAID_CCI400)	|
-		(TZC400_NSAID_RD_RW << TZC400_NSAID_PCIE)	|
-		(TZC400_NSAID_RD_RW << TZC400_NSAID_HDLCD0)	|
-		(TZC400_NSAID_RD_RW << TZC400_NSAID_HDLCD1)	|
-		(TZC400_NSAID_RD_RW << TZC400_NSAID_USB)	|
-		(TZC400_NSAID_RD_RW << TZC400_NSAID_DMA330)	|
-		(TZC400_NSAID_RD_RW << TZC400_NSAID_THINLINKS)	|
-		(TZC400_NSAID_RD_RW << TZC400_NSAID_AP)		|
-		(TZC400_NSAID_RD_RW << TZC400_NSAID_GPU)	|
-		(TZC400_NSAID_RD_RW << TZC400_NSAID_SCP)	|
-		(TZC400_NSAID_RD_RW << TZC400_NSAID_CORESIGHT)
+	mmio_write_32(TZC400_BASE + REGION_ID_ACCESS_OFF,
+		TZC_REGION_ACCESS_RDWR(TZC400_NSAID_CCI400)	|
+		TZC_REGION_ACCESS_RDWR(TZC400_NSAID_PCIE)	|
+		TZC_REGION_ACCESS_RDWR(TZC400_NSAID_HDLCD0)	|
+		TZC_REGION_ACCESS_RDWR(TZC400_NSAID_HDLCD1)	|
+		TZC_REGION_ACCESS_RDWR(TZC400_NSAID_USB)	|
+		TZC_REGION_ACCESS_RDWR(TZC400_NSAID_DMA330)	|
+		TZC_REGION_ACCESS_RDWR(TZC400_NSAID_THINLINKS)	|
+		TZC_REGION_ACCESS_RDWR(TZC400_NSAID_AP)		|
+		TZC_REGION_ACCESS_RDWR(TZC400_NSAID_GPU)	|
+		TZC_REGION_ACCESS_RDWR(TZC400_NSAID_SCP)	|
+		TZC_REGION_ACCESS_RDWR(TZC400_NSAID_CORESIGHT)
 		);
 }