Commit 7f56f240 authored by Chee Hong Ang's avatar Chee Hong Ang Committed by Abdul Halim, Muhammad Hadi Asyrafi
Browse files

intel: clear 'PLAT_SEC_ENTRY' in early platform setup



Ensure 'PLAT_SEC_ENTRY' is cleared during early platform
setup. This is to prevent the slave CPU cores jump to the stale
entry point after warm reset when using U-Boot SPL as first
stage boot loader.
Signed-off-by: default avatarChee Hong Ang <chee.hong.ang@intel.com>
Change-Id: I3294ce2f74aa691d0cf311fa30f27f9d4fb8800a
parent 95fca110
/* /*
* Copyright (c) 2019, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2019-2020, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2019, Intel Corporation. All rights reserved. * Copyright (c) 2019-2020, Intel Corporation. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
...@@ -39,6 +39,8 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, ...@@ -39,6 +39,8 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
{ {
static console_t console; static console_t console;
mmio_write_64(PLAT_SEC_ENTRY, PLAT_SEC_WARM_ENTRY);
console_16550_register(PLAT_UART0_BASE, PLAT_UART_CLOCK, PLAT_BAUDRATE, console_16550_register(PLAT_UART0_BASE, PLAT_UART_CLOCK, PLAT_BAUDRATE,
&console); &console);
/* /*
......
...@@ -134,6 +134,8 @@ ...@@ -134,6 +134,8 @@
#define PLAT_CPUID_RELEASE (BL_DATA_LIMIT - 16) #define PLAT_CPUID_RELEASE (BL_DATA_LIMIT - 16)
#define PLAT_SEC_ENTRY (BL_DATA_LIMIT - 8) #define PLAT_SEC_ENTRY (BL_DATA_LIMIT - 8)
#define PLAT_SEC_WARM_ENTRY 0
/******************************************************************************* /*******************************************************************************
* Platform specific page table and MMU setup constants * Platform specific page table and MMU setup constants
******************************************************************************/ ******************************************************************************/
......
/* /*
* Copyright (c) 2019, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2019-2020, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2019, Intel Corporation. All rights reserved. * Copyright (c) 2019-2020, Intel Corporation. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
...@@ -47,6 +47,8 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, ...@@ -47,6 +47,8 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
{ {
static console_t console; static console_t console;
mmio_write_64(PLAT_SEC_ENTRY, PLAT_SEC_WARM_ENTRY);
console_16550_register(PLAT_UART0_BASE, PLAT_UART_CLOCK, PLAT_BAUDRATE, console_16550_register(PLAT_UART0_BASE, PLAT_UART_CLOCK, PLAT_BAUDRATE,
&console); &console);
/* /*
......
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