Merge "stm32mp1: register shared resource per GPIO bank/pin" into integration

plat/st/common/include/stm32mp_shared_resources.h

@@ -29,6 +29,10 @@ void stm32mp_register_non_secure_periph(enum stm32mp_shres id);
 void stm32mp_register_secure_periph_iomem(uintptr_t base);
 void stm32mp_register_non_secure_periph_iomem(uintptr_t base);
 
+/* Register a GPIO as secure or non-secure based on its bank and pin numbers */
+void stm32mp_register_secure_gpio(unsigned int bank, unsigned int pin);
+void stm32mp_register_non_secure_gpio(unsigned int bank, unsigned int pin);
+
 /* Consolidate peripheral states and lock against new peripheral registering */
 void stm32mp_lock_periph_registering(void);
 #else
@@ -40,5 +44,15 @@ static inline
 void stm32mp_register_non_secure_periph_iomem(uintptr_t base __unused)
 {
 }
+
+static inline void stm32mp_register_secure_gpio(unsigned int bank __unused,
+						unsigned int pin __unused)
+{
+}
+
+static inline void stm32mp_register_non_secure_gpio(unsigned int bank __unused,
+						    unsigned int pin __unused)
+{
+}
 #endif /* STM32MP_SHARED_RESOURCES */
 #endif /* STM32MP_SHARED_RESOURCES_H */

plat/st/stm32mp1/stm32mp1_shared_resources.c

@@ -311,6 +311,29 @@ void stm32mp_register_non_secure_periph_iomem(uintptr_t base)
 	register_periph_iomem(base, SHRES_NON_SECURE);
 }
 
+void stm32mp_register_secure_gpio(unsigned int bank, unsigned int pin)
+{
+	switch (bank) {
+	case GPIO_BANK_Z:
+		register_periph(STM32MP1_SHRES_GPIOZ(pin), SHRES_SECURE);
+		break;
+	default:
+		ERROR("GPIO bank %u cannot be secured\n", bank);
+		panic();
+	}
+}
+
+void stm32mp_register_non_secure_gpio(unsigned int bank, unsigned int pin)
+{
+	switch (bank) {
+	case GPIO_BANK_Z:
+		register_periph(STM32MP1_SHRES_GPIOZ(pin), SHRES_NON_SECURE);
+		break;
+	default:
+		break;
+	}
+}
+
 static bool stm32mp_gpio_bank_is_non_secure(unsigned int bank)
 {
 	unsigned int non_secure = 0U;