Add "_arm" suffix to Makalu ELP CPU lib

ELP processors can sometimes have different MIDR values or features so
we are adding the "_arm" suffix to differentiate the reference
implementation from other future versions.
Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: Ieea444288587c7c18a397d279ee4b22b7ad79e20

include/lib/cpus/aarch64/cortex_makalu_elp.h → include/lib/cpus/aarch64/cortex_makalu_elp_arm.h

@@ -4,20 +4,20 @@
  * SPDX-License-Identifier: BSD-3-Clause
  */
 
-#ifndef CORTEX_MAKALU_ELP_H
-#define CORTEX_MAKALU_ELP_H
+#ifndef CORTEX_MAKALU_ELP_ARM_H
+#define CORTEX_MAKALU_ELP_ARM_H
 
-#define CORTEX_MAKALU_ELP_MIDR					U(0x410FD4E0)
+#define CORTEX_MAKALU_ELP_ARM_MIDR				U(0x410FD4E0)
 
 /*******************************************************************************
  * CPU Extended Control register specific definitions
  ******************************************************************************/
-#define CORTEX_MAKALU_ELP_CPUECTLR_EL1				S3_0_C15_C1_4
+#define CORTEX_MAKALU_ELP_ARM_CPUECTLR_EL1			S3_0_C15_C1_4
 
 /*******************************************************************************
  * CPU Power Control register specific definitions
  ******************************************************************************/
-#define CORTEX_MAKALU_ELP_CPUPWRCTLR_EL1			S3_0_C15_C2_7
-#define CORTEX_MAKALU_ELP_CPUPWRCTLR_EL1_CORE_PWRDN_BIT		U(1)
+#define CORTEX_MAKALU_ELP_ARM_CPUPWRCTLR_EL1			S3_0_C15_C2_7
+#define CORTEX_MAKALU_ELP_ARM_CPUPWRCTLR_EL1_CORE_PWRDN_BIT	U(1)
 
-#endif /* CORTEX_MAKALU_ELP_H */
+#endif /* CORTEX_MAKALU_ELP_ARM_H */

lib/cpus/aarch64/cortex_makalu_elp.S → lib/cpus/aarch64/cortex_makalu_elp_arm.S

@@ -7,7 +7,7 @@
 #include <arch.h>
 #include <asm_macros.S>
 #include <common/bl_common.h>
-#include <cortex_makalu_elp.h>
+#include <cortex_makalu_elp_arm.h>
 #include <cpu_macros.S>
 #include <plat_macros.S>
 
@@ -25,33 +25,33 @@
 	 * HW will do the cache maintenance while powering down
 	 * ----------------------------------------------------
 	 */
-func cortex_makalu_elp_core_pwr_dwn
+func cortex_makalu_elp_arm_core_pwr_dwn
 	/* ---------------------------------------------------
 	 * Enable CPU power down bit in power control register
 	 * ---------------------------------------------------
 	 */
-	mrs	x0, CORTEX_MAKALU_ELP_CPUPWRCTLR_EL1
-	orr	x0, x0, #CORTEX_MAKALU_ELP_CPUPWRCTLR_EL1_CORE_PWRDN_BIT
-	msr	CORTEX_MAKALU_ELP_CPUPWRCTLR_EL1, x0
+	mrs	x0, CORTEX_MAKALU_ELP_ARM_CPUPWRCTLR_EL1
+	orr	x0, x0, #CORTEX_MAKALU_ELP_ARM_CPUPWRCTLR_EL1_CORE_PWRDN_BIT
+	msr	CORTEX_MAKALU_ELP_ARM_CPUPWRCTLR_EL1, x0
 	isb
 	ret
-endfunc cortex_makalu_elp_core_pwr_dwn
+endfunc cortex_makalu_elp_arm_core_pwr_dwn
 
 #if REPORT_ERRATA
 /*
  * Errata printing function for Cortex Makalu ELP. Must follow AAPCS.
  */
-func cortex_makalu_elp_errata_report
+func cortex_makalu_elp_arm_errata_report
 	ret
-endfunc cortex_makalu_elp_errata_report
+endfunc cortex_makalu_elp_arm_errata_report
 #endif
 
-func cortex_makalu_elp_reset_func
+func cortex_makalu_elp_arm_reset_func
 	/* Disable speculative loads */
 	msr	SSBS, xzr
 	isb
 	ret
-endfunc cortex_makalu_elp_reset_func
+endfunc cortex_makalu_elp_arm_reset_func
 
 	/* ---------------------------------------------
 	 * This function provides Cortex Makalu ELP-
@@ -62,16 +62,16 @@ endfunc cortex_makalu_elp_reset_func
 	 * reported.
 	 * ---------------------------------------------
 	 */
-.section .rodata.cortex_makalu_elp_regs, "aS"
-cortex_makalu_elp_regs:  /* The ascii list of register names to be reported */
+.section .rodata.cortex_makalu_elp_arm_regs, "aS"
+cortex_makalu_elp_arm_regs:  /* The ascii list of register names to be reported */
 	.asciz	"cpuectlr_el1", ""
 
-func cortex_makalu_elp_cpu_reg_dump
-	adr	x6, cortex_makalu_elp_regs
-	mrs	x8, CORTEX_MAKALU_ELP_CPUECTLR_EL1
+func cortex_makalu_elp_arm_cpu_reg_dump
+	adr	x6, cortex_makalu_elp_arm_regs
+	mrs	x8, CORTEX_MAKALU_ELP_ARM_CPUECTLR_EL1
 	ret
-endfunc cortex_makalu_elp_cpu_reg_dump
+endfunc cortex_makalu_elp_arm_cpu_reg_dump
 
-declare_cpu_ops cortex_makalu_elp, CORTEX_MAKALU_ELP_MIDR, \
-	cortex_makalu_elp_reset_func, \
-	cortex_makalu_elp_core_pwr_dwn
+declare_cpu_ops cortex_makalu_elp_arm, CORTEX_MAKALU_ELP_ARM_MIDR, \
+	cortex_makalu_elp_arm_reset_func, \
+	cortex_makalu_elp_arm_core_pwr_dwn

plat/arm/board/arm_fpga/platform.mk

@@ -70,7 +70,7 @@ else
 				lib/cpus/aarch64/cortex_klein.S		\
 				lib/cpus/aarch64/cortex_matterhorn.S	\
 				lib/cpus/aarch64/cortex_makalu.S	\
-				lib/cpus/aarch64/cortex_makalu_elp.S    \
+				lib/cpus/aarch64/cortex_makalu_elp_arm.S \
 				lib/cpus/aarch64/cortex_a78c.S
 
 # AArch64/AArch32 cores

plat/arm/board/fvp/platform.mk

@@ -134,7 +134,7 @@ else
 					lib/cpus/aarch64/cortex_klein.S		\
 					lib/cpus/aarch64/cortex_matterhorn.S	\
 					lib/cpus/aarch64/cortex_makalu.S	\
-					lib/cpus/aarch64/cortex_makalu_elp.S	\
+					lib/cpus/aarch64/cortex_makalu_elp_arm.S \
 					lib/cpus/aarch64/cortex_a65.S		\
 					lib/cpus/aarch64/cortex_a65ae.S		\
 					lib/cpus/aarch64/cortex_a78c.S