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Commit 9e285909 authored by Abdul Halim, Muhammad Hadi Asyrafi's avatar Abdul Halim, Muhammad Hadi Asyrafi
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intel: mailbox: Fix non-MISRA compliant code 



This patch is used to fix remaining non compliant code for Intel
SocFPGA's mailbox driver. These changes include:
- adding integer literal for unsigned constant
- fix non-boolean controlling expression
- add braces even on conditional single statement bodies
Signed-off-by: default avatarAbdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I0f8fd96a3540f35ee102fd2f2369b76fa73e39e1
parent 99756047
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Inline Side-by-side
plat/intel/soc/common/soc/socfpga_mailbox.c
View file @ 9e285909
......@@ -54,7 +54,7 @@ static int write_mailbox_cmd_buffer(uint32_t *cin, uint32_t cout,
if (is_mailbox_cmdbuf_full(*cin)) {
if (!(*is_doorbell_triggered)) {
mmio_write_32(MBOX_OFFSET +
MBOX_DOORBELL_TO_SDM, 1);
MBOX_DOORBELL_TO_SDM, 1U);
*is_doorbell_triggered = true;
}
mdelay(10U);
......@@ -108,7 +108,7 @@ static int fill_mailbox_circular_buffer(uint32_t header_cmd, uint32_t *args,
}
if (!is_doorbell_triggered) {
mmio_write_32(MBOX_OFFSET + MBOX_DOORBELL_TO_SDM, 1);
mmio_write_32(MBOX_OFFSET + MBOX_DOORBELL_TO_SDM, 1U);
}
return MBOX_RET_OK;
......@@ -137,8 +137,9 @@ int mailbox_read_response(uint32_t *job_id, uint32_t *response, int resp_len)
int resp_data = 0;
int ret_resp_len;
if (mmio_read_32(MBOX_OFFSET + MBOX_DOORBELL_FROM_SDM))
mmio_write_32(MBOX_OFFSET + MBOX_DOORBELL_FROM_SDM, 0);
if (mmio_read_32(MBOX_OFFSET + MBOX_DOORBELL_FROM_SDM) == 1U) {
mmio_write_32(MBOX_OFFSET + MBOX_DOORBELL_FROM_SDM, 0U);
}
rin = mmio_read_32(MBOX_OFFSET + MBOX_RIN);
rout = mmio_read_32(MBOX_OFFSET + MBOX_ROUT);
......@@ -189,7 +190,7 @@ int mailbox_poll_response(uint32_t job_id, int urgent, uint32_t *response,
do {
if (mmio_read_32(MBOX_OFFSET + MBOX_DOORBELL_FROM_SDM)
& 1) {
== 1U) {
break;
}
mdelay(10U);
......@@ -199,18 +200,18 @@ int mailbox_poll_response(uint32_t job_id, int urgent, uint32_t *response,
break;
}
mmio_write_32(MBOX_OFFSET + MBOX_DOORBELL_FROM_SDM, 0);
mmio_write_32(MBOX_OFFSET + MBOX_DOORBELL_FROM_SDM, 0U);
if (urgent & 1) {
mdelay(5);
if ((urgent & 1) != 0) {
mdelay(5U);
if ((mmio_read_32(MBOX_OFFSET + MBOX_STATUS) &
MBOX_STATUS_UA_MASK) ^
(urgent & MBOX_STATUS_UA_MASK)) {
mmio_write_32(MBOX_OFFSET + MBOX_URG, 0);
mmio_write_32(MBOX_OFFSET + MBOX_URG, 0U);
return MBOX_RET_OK;
}
mmio_write_32(MBOX_OFFSET + MBOX_URG, 0);
mmio_write_32(MBOX_OFFSET + MBOX_URG, 0U);
INFO("Error: Mailbox did not get UA");
return MBOX_RET_ERROR;
}
......@@ -226,8 +227,9 @@ int mailbox_poll_response(uint32_t job_id, int urgent, uint32_t *response,
mmio_write_32(MBOX_OFFSET + MBOX_ROUT, rout);
if (MBOX_RESP_CLIENT_ID(resp_data) != MBOX_ATF_CLIENT_ID
|| MBOX_RESP_JOB_ID(resp_data) != job_id)
|| MBOX_RESP_JOB_ID(resp_data) != job_id) {
continue;
}
ret_resp_len = MBOX_RESP_LEN(resp_data);
......@@ -308,7 +310,7 @@ int mailbox_send_cmd_async(uint32_t *job_id, unsigned int cmd, uint32_t *args,
return status;
}
*job_id = (*job_id + 1) % MBOX_MAX_IND_JOB_ID;
*job_id = (*job_id + 1U) % MBOX_MAX_IND_JOB_ID;
return MBOX_RET_OK;
}
......@@ -318,11 +320,11 @@ int mailbox_send_cmd(uint32_t job_id, unsigned int cmd, uint32_t *args,
{
int status = 0;
if (urgent) {
if (urgent != 0) {
urgent |= mmio_read_32(MBOX_OFFSET + MBOX_STATUS) &
MBOX_STATUS_UA_MASK;
mmio_write_32(MBOX_OFFSET + MBOX_URG, cmd);
mmio_write_32(MBOX_OFFSET + MBOX_DOORBELL_TO_SDM, 1);
mmio_write_32(MBOX_OFFSET + MBOX_DOORBELL_TO_SDM, 1U);
}
else {
......@@ -333,8 +335,9 @@ int mailbox_send_cmd(uint32_t job_id, unsigned int cmd, uint32_t *args,
cmd, args, len);
}
if (status)
if (status != 0) {
return status;
}
status = mailbox_poll_response(job_id, urgent, response, resp_len);
......@@ -375,12 +378,12 @@ void mailbox_set_qspi_close(void)
CMD_CASUAL, NULL, 0);
}
void mailbox_qspi_set_cs(int device_select)
void mailbox_qspi_set_cs(uint32_t device_select)
{
uint32_t cs_setting = device_select;
uint32_t cs_setting;
/* QSPI device select settings at 31:28 */
cs_setting = (cs_setting << 28);
cs_setting = (device_select << 28);
mailbox_set_int(MBOX_INT_FLAG_COE | MBOX_INT_FLAG_RIE);
mailbox_send_cmd(MBOX_JOB_ID, MBOX_CMD_QSPI_SET_CS, &cs_setting,
1, CMD_CASUAL, NULL, 0);
......@@ -415,18 +418,21 @@ int mailbox_rsu_status(uint32_t *resp_buf, uint32_t resp_buf_len)
int ret;
struct rsu_status_info *info = (struct rsu_status_info *)resp_buf;
info->retry_counter = ~0;
info->retry_counter = ~0U;
ret = mailbox_send_cmd(MBOX_JOB_ID, MBOX_RSU_STATUS, NULL, 0,
CMD_CASUAL, (uint32_t *)resp_buf,
resp_buf_len);
if (ret < 0)
if (ret < 0) {
return ret;
}
if (info->retry_counter != ~0)
if (!(info->version & RSU_VERSION_ACMF_MASK))
if (info->retry_counter != ~0U) {
if ((info->version & RSU_VERSION_ACMF_MASK) == 0U) {
info->version |= RSU_VERSION_ACMF;
}
}
return ret;
}
......@@ -451,14 +457,15 @@ int mailbox_init(void)
mailbox_set_int(MBOX_INT_FLAG_COE | MBOX_INT_FLAG_RIE |
MBOX_INT_FLAG_UAE);
mmio_write_32(MBOX_OFFSET + MBOX_URG, 0);
mmio_write_32(MBOX_OFFSET + MBOX_DOORBELL_FROM_SDM, 0);
mmio_write_32(MBOX_OFFSET + MBOX_URG, 0U);
mmio_write_32(MBOX_OFFSET + MBOX_DOORBELL_FROM_SDM, 0U);
status = mailbox_send_cmd(0, MBOX_CMD_RESTART, NULL, 0,
status = mailbox_send_cmd(0U, MBOX_CMD_RESTART, NULL, 0,
CMD_URGENT, NULL, 0);
if (status)
if (status != 0) {
return status;
}
mailbox_set_int(MBOX_INT_FLAG_COE | MBOX_INT_FLAG_RIE |
MBOX_INT_FLAG_UAE);
......@@ -474,24 +481,29 @@ int intel_mailbox_get_config_status(uint32_t cmd)
status = mailbox_send_cmd(MBOX_JOB_ID, cmd, NULL, 0, CMD_CASUAL, response,
ARRAY_SIZE(response));
if (status < 0)
if (status < 0) {
return status;
}
res = response[RECONFIG_STATUS_STATE];
if (res && res != MBOX_CFGSTAT_STATE_CONFIG)
if ((res != 0U) && (res != MBOX_CFGSTAT_STATE_CONFIG)) {
return res;
}
res = response[RECONFIG_STATUS_PIN_STATUS];
if (!(res & PIN_STATUS_NSTATUS))
if ((res & PIN_STATUS_NSTATUS) == 0U) {
return MBOX_CFGSTAT_STATE_ERROR_HARDWARE;
}
res = response[RECONFIG_STATUS_SOFTFUNC_STATUS];
if (res & SOFTFUNC_STATUS_SEU_ERROR)
if ((res & SOFTFUNC_STATUS_SEU_ERROR) != 0U) {
return MBOX_CFGSTAT_STATE_ERROR_HARDWARE;
}
if ((res & SOFTFUNC_STATUS_CONF_DONE) &&
(res & SOFTFUNC_STATUS_INIT_DONE))
if ((res & SOFTFUNC_STATUS_CONF_DONE) != 0U &&
(res & SOFTFUNC_STATUS_INIT_DONE) != 0U) {
return MBOX_RET_OK;
}
return MBOX_CFGSTAT_STATE_CONFIG;
}
......@@ -500,8 +512,9 @@ int intel_mailbox_is_fpga_not_ready(void)
{
int ret = intel_mailbox_get_config_status(MBOX_RECONFIG_STATUS);
if (ret && ret != MBOX_CFGSTAT_STATE_CONFIG)
if ((ret != MBOX_RET_OK) && (ret != MBOX_CFGSTAT_STATE_CONFIG)) {
ret = intel_mailbox_get_config_status(MBOX_CONFIG_STATUS);
}
return ret;
}
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