Commit 9eb1bb63 authored by Jacky Bai's avatar Jacky Bai Committed by Manish Pandey
Browse files

plat: imx8m: Keep A53 PLAT on in wait mode(ret)



Keep A53 PLAT(SCU) power domain on in wait mode(ret).
RBC count only need to be set in PLAT OFF mode, so
change it accordingly.
Signed-off-by: default avatarJacky Bai <ping.bai@nxp.com>
Change-Id: Ie55e25c8210d298506fc4dca7a9653583db45e0c
parent 9ce37110
......@@ -133,14 +133,12 @@ void imx_set_cluster_powerdown(unsigned int last_core, uint8_t power_state)
val = mmio_read_32(IMX_GPC_BASE + LPCR_A53_AD);
val &= ~EN_L2_WFI_PDN;
/* L2 cache memory is on in WAIT mode */
if (is_local_state_off(power_state))
if (is_local_state_off(power_state)) {
val |= (L2PGE | EN_PLAT_PDN);
else
val |= EN_PLAT_PDN;
imx_a53_plat_slot_config(true);
}
mmio_write_32(IMX_GPC_BASE + LPCR_A53_AD, val);
imx_a53_plat_slot_config(true);
} else {
/* clear the slot and ack for cluster power down */
imx_a53_plat_slot_config(false);
......
......@@ -192,7 +192,7 @@ void __dead2 imx_pwr_domain_pwr_down_wfi(const psci_power_state_t *target_state)
* drived by the 32K OSC, so delay 30us to make sure the counter
* is really running.
*/
if (!is_local_state_run(CLUSTER_PWR_STATE(target_state))) {
if (is_local_state_off(CLUSTER_PWR_STATE(target_state))) {
imx_set_rbc_count();
udelay(30);
}
......
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