Tegra: define platform power states

The platform power states, PLAT_MAX_RET_STATE and PLAT_MAX_OFF_STATE,
can change on Tegra SoCs and so should be defined per-soc.

This patch moves these macro definitions to individual SoC's tegra_def.h
files.

Change-Id: Ib9b2752bc4d79cef6f79bee49882d340f71977a2
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

plat/nvidia/tegra/include/platform_def.h

@@ -52,12 +52,6 @@
 #define PLAT_NUM_PWR_DOMAINS		(PLATFORM_CORE_COUNT + \
 					 PLATFORM_CLUSTER_COUNT + 1)
 
-/*******************************************************************************
- * Platform power states
- ******************************************************************************/
-#define PLAT_MAX_RET_STATE		1
-#define PLAT_MAX_OFF_STATE		(PSTATE_ID_SOC_POWERDN + 1)
-
 /*******************************************************************************
  * Platform console related constants
  ******************************************************************************/

plat/nvidia/tegra/include/t132/tegra_def.h

@@ -39,6 +39,15 @@
  ******************************************************************************/
 #define PSTATE_ID_SOC_POWERDN	0xD
 
+/*******************************************************************************
+ * Platform power states (used by PSCI framework)
+ *
+ * - PLAT_MAX_RET_STATE should be less than lowest PSTATE_ID
+ * - PLAT_MAX_OFF_STATE should be greater than the highest PSTATE_ID
+ ******************************************************************************/
+#define PLAT_MAX_RET_STATE		1
+#define PLAT_MAX_OFF_STATE		(PSTATE_ID_SOC_POWERDN + 1)
+
 /*******************************************************************************
  * GIC memory map
  ******************************************************************************/

plat/nvidia/tegra/include/t210/tegra_def.h

@@ -47,6 +47,15 @@
  ******************************************************************************/
 #define PLAT_SYS_SUSPEND_STATE_ID	PSTATE_ID_SOC_POWERDN
 
+/*******************************************************************************
+ * Platform power states (used by PSCI framework)
+ *
+ * - PLAT_MAX_RET_STATE should be less than lowest PSTATE_ID
+ * - PLAT_MAX_OFF_STATE should be greater than the highest PSTATE_ID
+ ******************************************************************************/
+#define PLAT_MAX_RET_STATE		1
+#define PLAT_MAX_OFF_STATE		(PSTATE_ID_SOC_POWERDN + 1)
+
 /*******************************************************************************
  * GIC memory map
  ******************************************************************************/