Enable Debug and SError exceptions on warm boot path

Enable Debug and SError exceptions:
 - when receiving an SMC;
 - when a CPU is physically powered up (upon resumption from suspend
   or in response to a PSCI cpu_on call)

Change-Id: I7e5613e34034be6ed68ec9e2aef4de66aa5ac65e

include/cm_macros.S

@@ -59,6 +59,12 @@
 	 * -----------------------------------------------------
 	 */
 	.macro	handle_sync_exception
+	/* ---------------------------------------------
+	 * Enable Debug and SError interrupts
+	 * ---------------------------------------------
+	 */
+	msr	daifclr, #(DAIF_ABT_BIT | DAIF_DBG_BIT)
+
 	stp	x30, xzr, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR]
 	mrs	x30, esr_el3
 	ubfx	x30, x30, #ESR_EC_SHIFT, #ESR_EC_LENGTH

services/psci/psci_entry.S

@@ -75,6 +75,12 @@ psci_aff_common_finish_entry:
 	msr	vbar_el3, x0
 	isb
 
+	/* ---------------------------------------------
+	 * Enable Debug and SError interrupts
+	 * ---------------------------------------------
+	 */
+	msr	daifclr, #(DAIF_ABT_BIT | DAIF_DBG_BIT)
+
 	/* ---------------------------------------------
 	 * Use SP_EL0 for the C runtime stack.
 	 * ---------------------------------------------