Commit a4075bb5 authored by Madhukar Pappireddy's avatar Madhukar Pappireddy
Browse files

Fix broken links in docs



Change-Id: If82aaba9f2a5a74cfb5e4381f968166037a70037
Signed-off-by: default avatarMadhukar Pappireddy <madhukar.pappireddy@arm.com>
parent e4c83756
......@@ -233,12 +233,11 @@ The text in `Partitioning priority levels`_ only describes how the platform
expresses the required levels of priority. It however doesn't choose interrupts
nor program the required priority in GIC.
The `Firmware Design guide`__ explains methods for configuring secure
interrupts. |EHF| requires the platform to enumerate interrupt properties (as
opposed to just numbers) of Secure interrupts. The priority of secure interrupts
must match that as determined in the `Partitioning priority levels`_ section above.
.. __: firmware-design.rst#configuring-secure-interrupts
The :ref:`Firmware Design guide<configuring-secure-interrupts>` explains methods
for configuring secure interrupts. |EHF| requires the platform to enumerate
interrupt properties (as opposed to just numbers) of Secure interrupts. The
priority of secure interrupts must match that as determined in the
`Partitioning priority levels`_ section above.
See `Limitations`_, and also refer to `Interrupt handling example`_ for
illustration.
......
......@@ -126,7 +126,7 @@ The following TF-A build options are provisioned:
restoring) the EL2 system register context before entering (resp.
after leaving) the SPMC. It is mandatory when ``SPMD_SPM_AT_SEL2`` is
enabled. The context save/restore routine and exhaustive list of
registers is visible at `[4] <#References>`__.
registers is visible at `[4]`_.
- **SP_LAYOUT_FILE**: this option provides a text description file
providing paths to SP binary images and DTS format manifests
(see `Specifying partition binary image and DT`_). It
......
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