Rework BL3-1 unhandled exception handling and reporting

This patch implements the register reporting when unhandled exceptions are
taken in BL3-1. Unhandled exceptions will result in a dump of registers
to the console, before halting execution by that CPU. The Crash Stack,
previously called the Exception Stack, is used for this activity.
This stack is used to preserve the CPU context and runtime stack
contents for debugging and analysis.

This also introduces the per_cpu_ptr_cache, referenced by tpidr_el3,
to provide easy access to some of BL3-1 per-cpu data structures.
Initially, this is used to provide a pointer to the Crash stack.

panic() now prints the the error file and line number in Debug mode
and prints the PC value in release mode.

The Exception Stack is renamed to Crash Stack with this patch.
The original intention of exception stack is no longer valid
since we intend to support several valid exceptions like IRQ
and FIQ in the trusted firmware context. This stack is now
utilized for dumping and reporting the system state when a
crash happens and hence the rename.

Fixes ARM-software/tf-issues#79 Improve reporting of unhandled exception

Change-Id: I260791dc05536b78547412d147193cdccae7811a

services/std_svc/psci/psci_afflvl_on.c

@@ -374,11 +374,12 @@ static unsigned int psci_afflvl0_on_finish(unsigned long mpidr,
 	/*
 	 * Use the more complex exception vectors to enable SPD
 	 * initialisation. SP_EL3 should point to a 'cpu_context'
-	 * structure which has an exception stack allocated. The
-	 * calling cpu should have set the context already
+	 * structure. The calling cpu should have set the
+	 * context already
 	 */
 	assert(cm_get_context(mpidr, NON_SECURE));
 	cm_set_next_eret_context(NON_SECURE);
+	cm_init_pcpu_ptr_cache();
 	write_vbar_el3((uint64_t) runtime_exceptions);
 
 	/*

services/std_svc/psci/psci_afflvl_suspend.c

@@ -493,12 +493,12 @@ static unsigned int psci_afflvl0_suspend_finish(unsigned long mpidr,
 	/*
 	 * Use the more complex exception vectors to enable SPD
 	 * initialisation. SP_EL3 should point to a 'cpu_context'
-	 * structure which has an exception stack allocated. The
-	 * non-secure context should have been set on this cpu
-	 * prior to suspension.
+	 * structure. The non-secure context should have been
+	 * set on this cpu prior to suspension.
 	 */
 	assert(cm_get_context(mpidr, NON_SECURE));
 	cm_set_next_eret_context(NON_SECURE);
+	cm_init_pcpu_ptr_cache();
 	write_vbar_el3((uint64_t) runtime_exceptions);
 
 	/*

services/std_svc/psci/psci_setup.c

@@ -198,8 +198,6 @@ static void psci_init_aff_map_node(unsigned long mpidr,
 				(void *) &psci_ns_context[linear_id],
 				NON_SECURE);
 
-		/* Initialize exception stack in the context */
-		cm_init_exception_stack(mpidr, NON_SECURE);
 	}
 
 	return;