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Commit aa386f7a authored by Mark Dykes's avatar Mark Dykes Committed by TrustedFirmware Code Review
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Merge "Changes necessary to support SEPARATE_NOBITS_REGION feature" into integration

parents d81e38f6 76d84cbc
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bl31/aarch64/bl31_entrypoint.S
View file @ aa386f7a
/* /*
* Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
...@@ -110,13 +110,17 @@ func bl31_entrypoint ...@@ -110,13 +110,17 @@ func bl31_entrypoint
* caches and participate in coherency. * caches and participate in coherency.
* -------------------------------------------------------------------- * --------------------------------------------------------------------
*/ */
adr x0, __DATA_START__ adrp x0, __DATA_START__
adr x1, __DATA_END__ add x0, x0, :lo12:__DATA_START__
adrp x1, __DATA_END__
add x1, x1, :lo12:__DATA_END__
sub x1, x1, x0 sub x1, x1, x0
bl clean_dcache_range bl clean_dcache_range
adr x0, __BSS_START__ adrp x0, __BSS_START__
adr x1, __BSS_END__ add x0, x0, :lo12:__BSS_START__
adrp x1, __BSS_END__
add x1, x1, :lo12:__BSS_END__
sub x1, x1, x0 sub x1, x1, x0
bl clean_dcache_range bl clean_dcache_range
......
bl31/aarch64/runtime_exceptions.S
View file @ aa386f7a
/* /*
* Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
...@@ -414,7 +414,8 @@ smc_handler64: ...@@ -414,7 +414,8 @@ smc_handler64:
orr x16, x16, x15, lsl #FUNCID_OEN_WIDTH orr x16, x16, x15, lsl #FUNCID_OEN_WIDTH
/* Load descriptor index from array of indices */ /* Load descriptor index from array of indices */
adr x14, rt_svc_descs_indices adrp x14, rt_svc_descs_indices
add x14, x14, :lo12:rt_svc_descs_indices
ldrb w15, [x14, x16] ldrb w15, [x14, x16]
/* Any index greater than 127 is invalid. Check bit 7. */ /* Any index greater than 127 is invalid. Check bit 7. */
......
bl31/bl31.ld.S
View file @ aa386f7a
/* /*
* Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
...@@ -208,6 +208,7 @@ SECTIONS ...@@ -208,6 +208,7 @@ SECTIONS
* Define a linker symbol to mark end of the RW memory area for this * Define a linker symbol to mark end of the RW memory area for this
* image. * image.
*/ */
. = ALIGN(PAGE_SIZE);
__RW_END__ = .; __RW_END__ = .;
__BL31_END__ = .; __BL31_END__ = .;
......
lib/el3_runtime/aarch64/cpu_data.S
View file @ aa386f7a
/* /*
* Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2014-2020, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
...@@ -41,7 +41,8 @@ endfunc init_cpu_data_ptr ...@@ -41,7 +41,8 @@ endfunc init_cpu_data_ptr
func _cpu_data_by_index func _cpu_data_by_index
mov_imm x1, CPU_DATA_SIZE mov_imm x1, CPU_DATA_SIZE
mul x0, x0, x1 mul x0, x0, x1
adr x1, percpu_data adrp x1, percpu_data
add x1, x1, :lo12:percpu_data
add x0, x0, x1 add x0, x0, x1
ret ret
endfunc _cpu_data_by_index endfunc _cpu_data_by_index
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