Commit b3bd0731 authored by Jorge Ramirez-Ortiz's avatar Jorge Ramirez-Ortiz Committed by ldts
Browse files

rcar_gen3: drivers: spi multio bus controller


Signed-off-by: default avatarldts <jramirez@baylibre.com>
parent 0709efbe
/*
* Copyright (c) 2015-2018, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <mmio.h>
#include <stdint.h>
#include <string.h>
#include "cpg_registers.h"
#include "rpc_registers.h"
#include "debug.h"
#include "rcar_private.h"
#define MSTPSR9_RPC_BIT (0x00020000U)
#define RPC_CMNCR_MD_BIT (0x80000000U)
static void rpc_enable(void)
{
/* Enable clock supply to RPC. */
mstpcr_write(CPG_SMSTPCR9, CPG_MSTPSR9, MSTPSR9_RPC_BIT);
}
static void rpc_setup(void)
{
if (mmio_read_32(RPC_CMNCR) & RPC_CMNCR_MD_BIT)
mmio_clrbits_32(RPC_CMNCR, RPC_CMNCR_MD_BIT);
}
void rcar_rpc_init(void)
{
rpc_enable();
rpc_setup();
}
/*
* Copyright (c) 2015-2017, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef RPC_REGISTER_H__
#define RPC_REGISTER_H__
#define RPC_BASE (0xEE200000U)
#define RPC_CMNCR (RPC_BASE + 0x0000U)
#define RPC_SSLDR (RPC_BASE + 0x0004U)
#define RPC_DRCR (RPC_BASE + 0x000CU)
#define RPC_DRCMR (RPC_BASE + 0x0010U)
#define RPC_DRENR (RPC_BASE + 0x001CU)
#define RPC_SMCR (RPC_BASE + 0x0020U)
#define RPC_SMCMR (RPC_BASE + 0x0024U)
#define RPC_SMENR (RPC_BASE + 0x0030U)
#define RPC_CMNSR (RPC_BASE + 0x0048U)
#define RPC_DRDMCR (RPC_BASE + 0x0058U)
#define RPC_DRDRENR (RPC_BASE + 0x005CU)
#define RPC_PHYCNT (RPC_BASE + 0x007CU)
#define RPC_PHYINT (RPC_BASE + 0x0088U)
#endif
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