Merge changes I8d334231,Icd1ce8ec,Ic963c21c into integration

* changes:
  feat(tc0): add cpu capacity to provide scheduling information
  fix(tc0): remove "arm,psci" from psci node
  feat(tc0): update mhuv2 dts node to align with upstream driver

fdts/tc0.dts

@@ -86,6 +86,7 @@
 			enable-method = "psci";
 			clocks = <&scmi_dvfs 0>;
 			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
+			capacity-dmips-mhz = <406>;
 		};
 
 		CPU1:cpu@100 {
@@ -95,6 +96,7 @@
 			enable-method = "psci";
 			clocks = <&scmi_dvfs 0>;
 			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
+			capacity-dmips-mhz = <406>;
 		};
 
 		CPU2:cpu@200 {
@@ -104,6 +106,7 @@
 			enable-method = "psci";
 			clocks = <&scmi_dvfs 0>;
 			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
+			capacity-dmips-mhz = <406>;
 		};
 
 		CPU3:cpu@300 {
@@ -113,6 +116,7 @@
 			enable-method = "psci";
 			clocks = <&scmi_dvfs 0>;
 			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
+			capacity-dmips-mhz = <406>;
 		};
 
 		CPU4:cpu@400 {
@@ -122,6 +126,7 @@
 			enable-method = "psci";
 			clocks = <&scmi_dvfs 1>;
 			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
+			capacity-dmips-mhz = <912>;
 		};
 
 		CPU5:cpu@500 {
@@ -131,6 +136,7 @@
 			enable-method = "psci";
 			clocks = <&scmi_dvfs 1>;
 			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
+			capacity-dmips-mhz = <912>;
 		};
 
 		CPU6:cpu@600 {
@@ -140,6 +146,7 @@
 			enable-method = "psci";
 			clocks = <&scmi_dvfs 1>;
 			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
+			capacity-dmips-mhz = <912>;
 		};
 
 		CPU7:cpu@700 {
@@ -149,6 +156,7 @@
 			enable-method = "psci";
 			clocks = <&scmi_dvfs 2>;
 			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
+			capacity-dmips-mhz = <1024>;
 		};
 
 	};
@@ -170,7 +178,7 @@
 	};
 
 	psci {
-		compatible = "arm,psci-1.0", "arm,psci-0.2", "arm,psci";
+		compatible = "arm,psci-1.0", "arm,psci-0.2";
 		method = "smc";
 	};
 
@@ -189,31 +197,32 @@
 	};
 
 	mbox_db_rx: mhu@45010000 {
-		compatible = "arm,mhuv2","arm,primecell";
+		compatible = "arm,mhuv2-rx","arm,primecell";
 		reg = <0x0 0x45010000 0x0 0x1000>;
 		clocks = <&soc_refclk100mhz>;
 		clock-names = "apb_pclk";
-		#mbox-cells = <1>;
+		#mbox-cells = <2>;
 		interrupts = <0 317 4>;
 		interrupt-names = "mhu_rx";
 		mhu-protocol = "doorbell";
+		arm,mhuv2-protocols = <0 1>;
 	};
 
 	mbox_db_tx: mhu@45000000 {
-		compatible = "arm,mhuv2","arm,primecell";
+		compatible = "arm,mhuv2-tx","arm,primecell";
 		reg = <0x0 0x45000000 0x0 0x1000>;
 		clocks = <&soc_refclk100mhz>;
 		clock-names = "apb_pclk";
-		#mbox-cells = <1>;
+		#mbox-cells = <2>;
 		interrupt-names = "mhu_tx";
 		mhu-protocol = "doorbell";
+		arm,mhuv2-protocols = <0 1>;
 	};
 
 	scmi {
 		compatible = "arm,scmi";
-		method = "mailbox-doorbell";
 		mbox-names = "tx", "rx";
-		mboxes = <&mbox_db_tx 0 &mbox_db_rx 0>;
+		mboxes = <&mbox_db_tx 0 0 &mbox_db_rx 0 0 >;
 		shmem = <&cpu_scp_scmi_mem &cpu_scp_scmi_mem>;
 		#address-cells = <1>;
 		#size-cells = <0>;