renesas: rzg: Add support to identify EK874 RZ/G2E board

Add support to identify Silicon Linux RZ/G2E evaluation kit (EK874).
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Change-Id: Id7bdbc9b0d25aa9af496d58d4bd5055579edc104

drivers/renesas/rzg/board/board.c

@@ -17,6 +17,8 @@
 #define BOARD_DEFAULT		(BOARD_HIHOPE_RZ_G2H << BOARD_CODE_SHIFT)
 #elif (RCAR_LSI == RZ_G2N)
 #define BOARD_DEFAULT		(BOARD_HIHOPE_RZ_G2N << BOARD_CODE_SHIFT)
+#elif (RCAR_LSI == RZ_G2E)
+#define BOARD_DEFAULT		(BOARD_EK874_RZ_G2E << BOARD_CODE_SHIFT)
 #else
 #define BOARD_DEFAULT		(BOARD_HIHOPE_RZ_G2M << BOARD_CODE_SHIFT)
 #endif /* RCAR_LSI == RZ_G2H */
@@ -35,11 +37,13 @@
 #define HM_ID	{ 0x10U, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU }
 #define HH_ID	HM_ID
 #define HN_ID	{ 0x20U, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU }
+#define EK_ID	HM_ID
 
 const char *g_board_tbl[] = {
 	[BOARD_HIHOPE_RZ_G2M] = "HiHope RZ/G2M",
 	[BOARD_HIHOPE_RZ_G2H] = "HiHope RZ/G2H",
 	[BOARD_HIHOPE_RZ_G2N] = "HiHope RZ/G2N",
+	[BOARD_EK874_RZ_G2E] = "EK874 RZ/G2E",
 	[BOARD_UNKNOWN] = "unknown"
 };
 
@@ -50,8 +54,12 @@ void rzg_get_board_type(uint32_t *type, uint32_t *rev)
 		[BOARD_HIHOPE_RZ_G2M] = HM_ID,
 		[BOARD_HIHOPE_RZ_G2H] = HH_ID,
 		[BOARD_HIHOPE_RZ_G2N] = HN_ID,
+		[BOARD_EK874_RZ_G2E] = EK_ID,
 	};
-	uint32_t reg, boardInfo;
+	uint32_t reg;
+#if (RCAR_LSI != RZ_G2E)
+	uint32_t boardInfo;
+#endif /* RCAR_LSI == RZ_G2E */
 
 	if (board_id == BOARD_ID_UNKNOWN) {
 		board_id = BOARD_DEFAULT;
@@ -66,6 +74,13 @@ void rzg_get_board_type(uint32_t *type, uint32_t *rev)
 	}
 
 	reg = mmio_read_32(RCAR_PRR);
+#if (RCAR_LSI == RZ_G2E)
+	if (reg & RCAR_MINOR_MASK) {
+		*rev = 0x30U;
+	} else {
+		*rev = board_tbl[*type][(uint8_t)(board_id & BOARD_REV_MASK)];
+	}
+#else
 	if ((reg & PRR_CUT_MASK) == RCAR_M3_CUT_VER11) {
 		*rev = board_tbl[*type][(uint8_t)(board_id & BOARD_REV_MASK)];
 	} else {
@@ -78,4 +93,5 @@ void rzg_get_board_type(uint32_t *type, uint32_t *rev)
 				((boardInfo & GP5_21_BIT) >> 17)) + 0x30U;
 		}
 	}
+#endif /* RCAR_LSI == RZ_G2E */
 }

drivers/renesas/rzg/board/board.h

@@ -11,6 +11,7 @@ enum rzg2_board_id {
 	BOARD_HIHOPE_RZ_G2M = 0,
 	BOARD_HIHOPE_RZ_G2H,
 	BOARD_HIHOPE_RZ_G2N,
+	BOARD_EK874_RZ_G2E,
 	BOARD_UNKNOWN
 };
 

plat/renesas/common/bl2_cpg_init.c

@@ -34,7 +34,7 @@ static void bl2_realtime_cpg_init_v3m(void);
 static void bl2_system_cpg_init_v3m(void);
 #endif
 
-#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RCAR_E3)
+#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RCAR_E3) || (RCAR_LSI == RZ_G2E)
 static void bl2_realtime_cpg_init_e3(void);
 static void bl2_system_cpg_init_e3(void);
 #endif
@@ -58,7 +58,7 @@ static void bl2_secure_cpg_init(void)
 #if (RCAR_LSI == RCAR_D3)
 	reset_cr2 = 0x00000000U;
 	stop_cr2 = 0xFFFFFFFFU;
-#elif (RCAR_LSI == RCAR_E3)
+#elif (RCAR_LSI == RCAR_E3) || (RCAR_LSI == RZ_G2E)
 	reset_cr2 = 0x10000000U;
 	stop_cr2 = 0xEFFFFFFFU;
 #else
@@ -255,7 +255,7 @@ static void bl2_system_cpg_init_v3m(void)
 }
 #endif
 
-#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RCAR_E3)
+#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RCAR_E3) || (RCAR_LSI == RZ_G2E)
 static void bl2_realtime_cpg_init_e3(void)
 {
 	/* Realtime Module Stop Control Registers */
@@ -370,7 +370,7 @@ void bl2_cpg_init(void)
 		bl2_realtime_cpg_init_m3n();
 #elif RCAR_LSI == RCAR_V3M
 		bl2_realtime_cpg_init_v3m();
-#elif RCAR_LSI == RCAR_E3
+#elif RCAR_LSI == RCAR_E3 || RCAR_LSI == RZ_G2E
 		bl2_realtime_cpg_init_e3();
 #elif RCAR_LSI == RCAR_D3
 		bl2_realtime_cpg_init_d3();
@@ -416,7 +416,7 @@ void bl2_system_cpg_init(void)
 	bl2_system_cpg_init_m3n();
 #elif RCAR_LSI == RCAR_V3M
 	bl2_system_cpg_init_v3m();
-#elif RCAR_LSI == RCAR_E3
+#elif RCAR_LSI == RCAR_E3 || RCAR_LSI == RZ_G2E
 	bl2_system_cpg_init_e3();
 #elif RCAR_LSI == RCAR_D3
 	bl2_system_cpg_init_d3();

plat/renesas/rzg/bl2_plat_setup.c

@@ -84,12 +84,20 @@ static void bl2_init_generic_timer(void);
 #elif RCAR_LSI == RZ_G2N
 #define TARGET_PRODUCT			PRR_PRODUCT_M3N
 #define TARGET_NAME			"RZ/G2N"
+#elif RCAR_LSI == RZ_G2E
+#define TARGET_PRODUCT			PRR_PRODUCT_E3
+#define TARGET_NAME			"RZ/G2E"
 #elif RCAR_LSI == RCAR_AUTO
 #define TARGET_NAME			"RZ/G2M"
 #endif /* RCAR_LSI == RZ_G2M */
 
+#if (RCAR_LSI == RZ_G2E)
+#define GPIO_INDT			(GPIO_INDT6)
+#define GPIO_BKUP_TRG_SHIFT		((uint32_t)1U << 13U)
+#else
 #define GPIO_INDT			(GPIO_INDT1)
 #define GPIO_BKUP_TRG_SHIFT		(1U << 8U)
+#endif /* RCAR_LSI == RZ_G2E */
 
 CASSERT((PARAMS_BASE + sizeof(bl2_to_bl31_params_mem_t) + 0x100)
 	 < (RCAR_SHARED_MEM_BASE + RCAR_SHARED_MEM_SIZE),
@@ -438,6 +446,10 @@ static void bl2_populate_compatible_string(void *dt)
 		ret = fdt_setprop_string(dt, 0, "compatible",
 					 "hoperun,hihope-rzg2n");
 		break;
+	case BOARD_EK874_RZ_G2E:
+		ret = fdt_setprop_string(dt, 0, "compatible",
+					 "si-linux,cat874");
+		break;
 	default:
 		NOTICE("BL2: Cannot set compatible string, board unsupported\n");
 		panic();
@@ -463,6 +475,10 @@ static void bl2_populate_compatible_string(void *dt)
 		ret = fdt_appendprop_string(dt, 0, "compatible",
 					    "renesas,r8a774b1");
 		break;
+	case PRR_PRODUCT_E3:
+		ret = fdt_appendprop_string(dt, 0, "compatible",
+					    "renesas,r8a774c0");
+		break;
 	default:
 		NOTICE("BL2: Cannot set compatible string, SoC unsupported\n");
 		panic();
@@ -606,6 +622,18 @@ static void bl2_advertise_dram_size(uint32_t product)
 		/* 4GB(4GBx1) */
 		dram_config[1] = 0x100000000ULL;
 		break;
+	case PRR_PRODUCT_E3:
+#if (RCAR_DRAM_DDR3L_MEMCONF == 0)
+		/* 1GB(512MBx2) */
+		dram_config[1] = 0x40000000ULL;
+#elif (RCAR_DRAM_DDR3L_MEMCONF == 1)
+		/* 2GB(512MBx4) */
+		dram_config[1] = 0x80000000ULL;
+#elif (RCAR_DRAM_DDR3L_MEMCONF == 2)
+		/* 4GB(1GBx4) */
+		dram_config[1] = 0x100000000ULL;
+#endif /* RCAR_DRAM_DDR3L_MEMCONF == 0 */
+		break;
 	default:
 		NOTICE("BL2: Detected invalid DRAM entries\n");
 		break;
@@ -624,6 +652,7 @@ void bl2_el3_early_platform_setup(u_register_t arg1, u_register_t arg2,
 	const char *unknown = "unknown";
 	const char *cpu_ca57 = "CA57";
 	const char *cpu_ca53 = "CA53";
+	const char *product_g2e = "G2E";
 	const char *product_g2h = "G2H";
 	const char *product_g2m = "G2M";
 	const char *product_g2n = "G2N";
@@ -632,7 +661,14 @@ void bl2_el3_early_platform_setup(u_register_t arg1, u_register_t arg2,
 	const char *boot_qspi80 = "QSPI Flash(80MHz)";
 	const char *boot_emmc25x1 = "eMMC(25MHz x1)";
 	const char *boot_emmc50x8 = "eMMC(50MHz x8)";
+#if (RCAR_LSI == RZ_G2E)
+	uint32_t sscg;
+	const char *sscg_on = "PLL1 SSCG Clock select";
+	const char *sscg_off = "PLL1 nonSSCG Clock select";
+	const char *boot_hyper160 = "HyperFlash(150MHz)";
+#else
 	const char *boot_hyper160 = "HyperFlash(160MHz)";
+#endif /* RCAR_LSI == RZ_G2E */
 #if RZG_LCS_STATE_DETECTION_ENABLE
 	uint32_t lcs;
 	const char *lcs_secure = "SE";
@@ -700,6 +736,9 @@ void bl2_el3_early_platform_setup(u_register_t arg1, u_register_t arg2,
 	case PRR_PRODUCT_M3N:
 		str = product_g2n;
 		break;
+	case PRR_PRODUCT_E3:
+		str = product_g2e;
+		break;
 	default:
 		str = unknown;
 		break;
@@ -721,12 +760,22 @@ void bl2_el3_early_platform_setup(u_register_t arg1, u_register_t arg2,
 		NOTICE("BL2: PRR is RZ/%s Ver.%d.%d\n", str, major, minor);
 	}
 
+#if (RCAR_LSI == RZ_G2E)
+	if (product == PRR_PRODUCT_E3) {
+		reg = mmio_read_32(RCAR_MODEMR);
+		sscg = reg & RCAR_SSCG_MASK;
+		str = sscg == RCAR_SSCG_ENABLE ? sscg_on : sscg_off;
+		NOTICE("BL2: %s\n", str);
+	}
+#endif /* RCAR_LSI == RZ_G2E */
+
 	rzg_get_board_type(&type, &rev);
 
 	switch (type) {
 	case BOARD_HIHOPE_RZ_G2M:
 	case BOARD_HIHOPE_RZ_G2H:
 	case BOARD_HIHOPE_RZ_G2N:
+	case BOARD_EK874_RZ_G2E:
 		break;
 	default:
 		type = BOARD_UNKNOWN;
@@ -940,6 +989,9 @@ void bl2_platform_setup(void)
 
 static void bl2_init_generic_timer(void)
 {
+#if RCAR_LSI == RZ_G2E
+	uint32_t reg_cntfid = EXTAL_EBISU;
+#else
 	uint32_t reg_cntfid;
 	uint32_t modemr;
 	uint32_t modemr_pll;
@@ -955,6 +1007,7 @@ static void bl2_init_generic_timer(void)
 
 	/* Set frequency data in CNTFID0 */
 	reg_cntfid = pll_table[modemr_pll >> MODEMR_BOOT_PLL_SHIFT];
+#endif /* RCAR_LSI == RZ_G2E */
 
 	/* Update memory mapped and register based frequency */
 	write_cntfrq_el0((u_register_t)reg_cntfid);

plat/renesas/rzg/platform.mk

@@ -64,6 +64,23 @@ else
       endif
       $(eval $(call add_define,RCAR_LSI_CUT))
     endif
+  else ifeq (${LSI},G2E)
+    RCAR_LSI:=${RZ_G2E}
+    ifndef LSI_CUT
+      # enable compatible function.
+      RCAR_LSI_CUT_COMPAT := 1
+      $(eval $(call add_define,RCAR_LSI_CUT_COMPAT))
+    else
+      # disable compatible function.
+      ifeq (${LSI_CUT},10)
+        RCAR_LSI_CUT:=0
+      else ifeq (${LSI_CUT},11)
+        RCAR_LSI_CUT:=1
+      else
+        $(error "Error: ${LSI_CUT} is not supported.")
+      endif
+      $(eval $(call add_define,RCAR_LSI_CUT))
+    endif
   else
     $(error "Error: ${LSI} is not supported.")
   endif