Unverified Commit bd8e6a99 authored by davidcunado-arm's avatar davidcunado-arm Committed by GitHub
Browse files

Merge pull request #1287 from davidcunado-arm/dc/fix_misra

Update ULL() macro and instances of ull to comply with MISRA
parents c69145fc 5724481f
......@@ -459,19 +459,19 @@ constants must also be defined:
- **#define : ADDR\_SPACE\_SIZE**
Defines the total size of the address space in bytes. For example, for a 32
bit address space, this value should be ``(1ull << 32)``. This definition is
bit address space, this value should be ``(1ULL << 32)``. This definition is
now deprecated, platforms should use ``PLAT_PHY_ADDR_SPACE_SIZE`` and
``PLAT_VIRT_ADDR_SPACE_SIZE`` instead.
- **#define : PLAT\_VIRT\_ADDR\_SPACE\_SIZE**
Defines the total size of the virtual address space in bytes. For example,
for a 32 bit virtual address space, this value should be ``(1ull << 32)``.
for a 32 bit virtual address space, this value should be ``(1ULL << 32)``.
- **#define : PLAT\_PHY\_ADDR\_SPACE\_SIZE**
Defines the total size of the physical address space in bytes. For example,
for a 32 bit physical address space, this value should be ``(1ull << 32)``.
for a 32 bit physical address space, this value should be ``(1ULL << 32)``.
If the platform port uses the IO storage framework, the following constants
must also be defined:
......
......@@ -80,8 +80,8 @@
# define U(_x) (_x)
# define ULL(_x) (_x)
#else
# define U(_x) (_x##u)
# define ULL(_x) (_x##ull)
# define U(_x) (_x##U)
# define ULL(_x) (_x##ULL)
#endif
/* Register size of the current architecture. */
......
......@@ -279,11 +279,11 @@
* AArch64 builds
*/
#ifdef AARCH64
#define PLAT_PHY_ADDR_SPACE_SIZE (1ull << 36)
#define PLAT_VIRT_ADDR_SPACE_SIZE (1ull << 36)
#define PLAT_PHY_ADDR_SPACE_SIZE (1ULL << 36)
#define PLAT_VIRT_ADDR_SPACE_SIZE (1ULL << 36)
#else
#define PLAT_PHY_ADDR_SPACE_SIZE (1ull << 32)
#define PLAT_VIRT_ADDR_SPACE_SIZE (1ull << 32)
#define PLAT_PHY_ADDR_SPACE_SIZE (1ULL << 32)
#define PLAT_VIRT_ADDR_SPACE_SIZE (1ULL << 32)
#endif
......
......@@ -31,7 +31,7 @@
#define debug_print(...) ((void)0)
#endif
#define UNSET_DESC ~0ull
#define UNSET_DESC ~0ULL
static uint64_t xlat_tables[MAX_XLAT_TABLES][XLAT_TABLE_ENTRIES]
__aligned(XLAT_TABLE_SIZE) __section("xlat_table");
......
......@@ -22,7 +22,7 @@
unsigned long long xlat_arch_get_max_supported_pa(void)
{
/* Physical address space size for long descriptor format. */
return (1ull << 40) - 1ull;
return (1ULL << 40) - 1ULL;
}
#endif /* ENABLE_ASSERTIONS*/
......
......@@ -62,7 +62,7 @@ unsigned long long xlat_arch_get_max_supported_pa(void)
/* All other values are reserved */
assert(pa_range < ARRAY_SIZE(pa_range_bits_arr));
return (1ull << pa_range_bits_arr[pa_range]) - 1ull;
return (1ULL << pa_range_bits_arr[pa_range]) - 1ULL;
}
#endif /* ENABLE_ASSERTIONS*/
......
......@@ -14,7 +14,7 @@
#define PWKUPR_OFF 0xc
#define PSYSR_OFF 0x10
#define PWKUPR_WEN (1ull << 31)
#define PWKUPR_WEN (1ULL << 31)
#define PSYSR_AFF_L2 (1 << 31)
#define PSYSR_AFF_L1 (1 << 30)
......
......@@ -149,7 +149,7 @@
/*
* Platform specific page table and MMU setup constants
*/
#define ADDR_SPACE_SIZE (1ull << 32)
#define ADDR_SPACE_SIZE (1ULL << 32)
#if defined(IMAGE_BL1) || defined(IMAGE_BL32)
#define MAX_XLAT_TABLES 3
......
......@@ -114,7 +114,7 @@
/*
* Platform specific page table and MMU setup constants
*/
#define ADDR_SPACE_SIZE (1ull << 32)
#define ADDR_SPACE_SIZE (1ULL << 32)
#if defined(IMAGE_BL1) || defined(IMAGE_BL31) || defined(IMAGE_BL32)
#define MAX_XLAT_TABLES 3
......
......@@ -122,7 +122,7 @@
#define PLAT_POPLAR_NS_IMAGE_OFFSET 0x37000000
/* Page table and MMU setup constants */
#define ADDR_SPACE_SIZE (1ull << 32)
#define ADDR_SPACE_SIZE (1ULL << 32)
#define MAX_XLAT_TABLES (4)
#define MAX_MMAP_REGIONS (16)
......
......@@ -196,7 +196,7 @@
/*******************************************************************************
* Platform specific page table and MMU setup constants
******************************************************************************/
#define ADDR_SPACE_SIZE (1ull << 32)
#define ADDR_SPACE_SIZE (1ULL << 32)
#define MAX_XLAT_TABLES 7
#define MAX_MMAP_REGIONS 16
......
......@@ -96,8 +96,8 @@
/*******************************************************************************
* Platform specific page table and MMU setup constants
******************************************************************************/
#define PLAT_PHY_ADDR_SPACE_SIZE (1ull << 32)
#define PLAT_VIRT_ADDR_SPACE_SIZE (1ull << 32)
#define PLAT_PHY_ADDR_SPACE_SIZE (1ULL << 32)
#define PLAT_VIRT_ADDR_SPACE_SIZE (1ULL << 32)
#define MAX_XLAT_TABLES 4
#define MAX_MMAP_REGIONS 16
......
......@@ -166,8 +166,8 @@
#define NS_IMAGE_OFFSET 0x60000000
#define PLAT_PHY_ADDR_SPACE_SIZE (1ull << 32)
#define PLAT_VIRT_ADDR_SPACE_SIZE (1ull << 32)
#define PLAT_PHY_ADDR_SPACE_SIZE (1ULL << 32)
#define PLAT_VIRT_ADDR_SPACE_SIZE (1ULL << 32)
#define MAX_MMAP_REGIONS 8
#define MAX_XLAT_TABLES 6
#define MAX_IO_DEVICES 3
......
......@@ -85,7 +85,7 @@
/*******************************************************************************
* Platform specific page table and MMU setup constants
******************************************************************************/
#define ADDR_SPACE_SIZE (1ull << 32)
#define ADDR_SPACE_SIZE (1ULL << 32)
#define MAX_XLAT_TABLES 9
#define MAX_MMAP_REGIONS 33
......
......@@ -85,7 +85,7 @@
/*******************************************************************************
* Platform specific page table and MMU setup constants
******************************************************************************/
#define ADDR_SPACE_SIZE (1ull << 32)
#define ADDR_SPACE_SIZE (1ULL << 32)
#define MAX_XLAT_TABLES 8
#define MAX_MMAP_REGIONS 16
......
......@@ -68,7 +68,7 @@
/*******************************************************************************
* Platform specific page table and MMU setup constants
******************************************************************************/
#define ADDR_SPACE_SIZE (1ull << 32)
#define ADDR_SPACE_SIZE (1ULL << 32)
#define MAX_XLAT_TABLES 20
#define MAX_MMAP_REGIONS 25
......
......@@ -76,8 +76,8 @@
/*******************************************************************************
* Platform specific page table and MMU setup constants
******************************************************************************/
#define PLAT_PHY_ADDR_SPACE_SIZE (1ull << 32)
#define PLAT_VIRT_ADDR_SPACE_SIZE (1ull << 32)
#define PLAT_PHY_ADDR_SPACE_SIZE (1ULL << 32)
#define PLAT_VIRT_ADDR_SPACE_SIZE (1ULL << 32)
#define MAX_MMAP_REGIONS 7
#define MAX_XLAT_TABLES 5
......
Markdown is supported
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment