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adam.huang
Arm Trusted Firmware
Commits
be7dc2df
Commit
be7dc2df
authored
4 years ago
by
André Przywara
Committed by
TrustedFirmware Code Review
4 years ago
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Merge "allwinner: Fix non-default PRELOADED_BL33_BASE" into integration
parents
b51d466a
3d36d8e6
Changes
4
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4 changed files
plat/allwinner/common/allwinner-common.mk
+3
-0
plat/allwinner/common/allwinner-common.mk
plat/allwinner/common/include/platform_def.h
+0
-3
plat/allwinner/common/include/platform_def.h
plat/allwinner/common/sunxi_bl31_setup.c
+2
-2
plat/allwinner/common/sunxi_bl31_setup.c
plat/allwinner/common/sunxi_common.c
+1
-10
plat/allwinner/common/sunxi_common.c
with
6 additions
and
15 deletions
+6
-15
plat/allwinner/common/allwinner-common.mk
View file @
be7dc2df
...
...
@@ -50,6 +50,9 @@ ERRATA_A53_843419 := 1
ERRATA_A53_855873
:=
1
ERRATA_A53_1530924
:=
1
# The traditional U-Boot load address is 160MB into DRAM.
PRELOADED_BL33_BASE
?=
0x4a000000
# The reset vector can be changed for each CPU.
PROGRAMMABLE_RESET_ADDRESS
:=
1
...
...
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plat/allwinner/common/include/platform_def.h
View file @
be7dc2df
...
...
@@ -25,9 +25,6 @@
#define BL31_NOBITS_BASE (SUNXI_SRAM_A1_BASE + 0x1000)
#define BL31_NOBITS_LIMIT (SUNXI_SRAM_A1_BASE + SUNXI_SRAM_A1_SIZE)
/* The traditional U-Boot load address is 160MB into DRAM, so at 0x4a000000 */
#define PLAT_SUNXI_NS_IMAGE_OFFSET (SUNXI_DRAM_BASE + (160U << 20))
/* How much memory to reserve as secure for BL32, if configured */
#define SUNXI_DRAM_SEC_SIZE (32U << 20)
...
...
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plat/allwinner/common/sunxi_bl31_setup.c
View file @
be7dc2df
...
...
@@ -57,7 +57,7 @@ static void *sunxi_find_dtb(void)
for
(
i
=
0
;
i
<
2048
/
sizeof
(
uint64_t
);
i
++
)
{
uint32_t
*
dtb_base
;
if
(
u_boot_base
[
i
]
!=
P
LAT_SUNXI_NS_IMAGE_OFF
SE
T
)
if
(
u_boot_base
[
i
]
!=
P
RELOADED_BL33_BA
SE
)
continue
;
/* Does the suspected U-Boot size look anyhow reasonable? */
...
...
@@ -96,7 +96,7 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
* Tell BL31 where the non-trusted software image
* is located and the entry state information
*/
bl33_image_ep_info
.
pc
=
plat_get_ns_image_entrypoint
()
;
bl33_image_ep_info
.
pc
=
PRELOADED_BL33_BASE
;
bl33_image_ep_info
.
spsr
=
SPSR_64
(
MODE_EL2
,
MODE_SP_ELX
,
DISABLE_ALL_EXCEPTIONS
);
SET_SECURITY_STATE
(
bl33_image_ep_info
.
h
.
attr
,
NON_SECURE
);
...
...
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plat/allwinner/common/sunxi_common.c
View file @
be7dc2df
...
...
@@ -27,7 +27,7 @@ static const mmap_region_t sunxi_mmap[PLATFORM_MMAP_REGIONS + 1] = {
MT_DEVICE
|
MT_RW
|
MT_SECURE
|
MT_EXECUTE_NEVER
),
MAP_REGION
(
SUNXI_DRAM_BASE
,
SUNXI_DRAM_VIRT_BASE
,
SUNXI_DRAM_SEC_SIZE
,
MT_RW_DATA
|
MT_SECURE
),
MAP_REGION
(
P
LAT_SUNXI_NS_IMAGE_OFF
SE
T
,
MAP_REGION
(
P
RELOADED_BL33_BA
SE
,
SUNXI_DRAM_VIRT_BASE
+
SUNXI_DRAM_SEC_SIZE
,
SUNXI_DRAM_MAP_SIZE
,
MT_RO_DATA
|
MT_NS
),
...
...
@@ -39,15 +39,6 @@ unsigned int plat_get_syscnt_freq2(void)
return
SUNXI_OSC24M_CLK_IN_HZ
;
}
uintptr_t
plat_get_ns_image_entrypoint
(
void
)
{
#ifdef PRELOADED_BL33_BASE
return
PRELOADED_BL33_BASE
;
#else
return
PLAT_SUNXI_NS_IMAGE_OFFSET
;
#endif
}
void
sunxi_configure_mmu_el3
(
int
flags
)
{
mmap_add_region
(
BL_CODE_BASE
,
BL_CODE_BASE
,
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...
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