Commit c0ea3b1b authored by Etienne Carriere's avatar Etienne Carriere Committed by Etienne Carriere
Browse files

plat/st: move GPIO bank helper function to platform source files



Relation between GPIO banks and their base address and offset address
if platform dependent. This change moves helper functions
stm32_get_gpio_bank_base() and stm32_get_gpio_bank_offset() from
plat/st/common to plat/st/stm32mp1/.

Change-Id: Id3d03e585746aa5509c6fab7d88183a92d561e3f
Signed-off-by: default avatarEtienne Carriere <etienne.carriere@st.com>
parent 4e2887f2
......@@ -97,28 +97,6 @@ bool stm32mp_lock_available(void)
return (read_sctlr() & c_m_bits) == c_m_bits;
}
uintptr_t stm32_get_gpio_bank_base(unsigned int bank)
{
if (bank == GPIO_BANK_Z) {
return GPIOZ_BASE;
}
assert(GPIO_BANK_A == 0 && bank <= GPIO_BANK_K);
return GPIOA_BASE + (bank * GPIO_BANK_OFFSET);
}
uint32_t stm32_get_gpio_bank_offset(unsigned int bank)
{
if (bank == GPIO_BANK_Z) {
return 0;
}
assert(GPIO_BANK_A == 0 && bank <= GPIO_BANK_K);
return bank * GPIO_BANK_OFFSET;
}
int stm32mp_check_header(boot_api_image_header_t *header, uintptr_t buffer)
{
uint32_t i;
......
......@@ -76,6 +76,28 @@ void configure_mmu(void)
enable_mmu_svc_mon(0);
}
uintptr_t stm32_get_gpio_bank_base(unsigned int bank)
{
if (bank == GPIO_BANK_Z) {
return GPIOZ_BASE;
}
assert(GPIO_BANK_A == 0 && bank <= GPIO_BANK_K);
return GPIOA_BASE + (bank * GPIO_BANK_OFFSET);
}
uint32_t stm32_get_gpio_bank_offset(unsigned int bank)
{
if (bank == GPIO_BANK_Z) {
return 0;
}
assert(GPIO_BANK_A == 0 && bank <= GPIO_BANK_K);
return bank * GPIO_BANK_OFFSET;
}
unsigned long stm32_get_gpio_bank_clock(unsigned int bank)
{
if (bank == GPIO_BANK_Z) {
......
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