Tegra210: skip the BTB invalidate workaround for B01 SKUs

This patch skips the BTB invalidate workaround for Tegra210-B01 chips, as
they have already been fixed in the hardware. To allow the .S file to
include macros, add proper guards to tegra_platform.h.

Change-Id: I0826d3c54faeffc9cb0709331f47cbdf25d4b653
Signed-off-by: Harvey Hsieh <hhsieh@nvidia.com>

plat/nvidia/tegra/common/aarch64/tegra_helpers.S

@@ -11,6 +11,7 @@
 #include <cortex_a57.h>
 #include <platform_def.h>
 #include <tegra_def.h>
+#include <tegra_platform.h>
 
 #define MIDR_PN_CORTEX_A57		0xD07
 
@@ -311,6 +312,23 @@ func tegra_secure_entrypoint _align=6
 
 #if ERRATA_TEGRA_INVALIDATE_BTB_AT_BOOT
 
+	/* --------------------------------------------------------
+	 * Skip the invalidate BTB workaround for Tegra210B01 SKUs.
+	 * --------------------------------------------------------
+	 */
+	mov	x0, #TEGRA_MISC_BASE
+	add	x0, x0, #HARDWARE_REVISION_OFFSET
+	ldr	w1, [x0]
+	lsr	w1, w1, #CHIP_ID_SHIFT
+	and	w1, w1, #CHIP_ID_MASK
+	cmp	w1, #TEGRA_CHIPID_TEGRA21	/* T210? */
+	b.ne	2f
+	ldr	w1, [x0]
+	lsr	w1, w1, #MAJOR_VERSION_SHIFT
+	and	w1, w1, #MAJOR_VERSION_MASK
+	cmp	w1, #0x02			/* T210 B01? */
+	b.eq	2f
+
 	/* -------------------------------------------------------
 	 * Invalidate BTB along with I$ to remove any stale
 	 * entries from the branch predictor array.
@@ -367,7 +385,7 @@ func tegra_secure_entrypoint _align=6
 	.rept	65
 	nop
 	.endr
-
+2:
 	/* --------------------------------------------------
 	 * Do not insert instructions here
 	 * --------------------------------------------------

plat/nvidia/tegra/common/tegra_platform.c

@@ -47,15 +47,6 @@ typedef enum tegra_platform {
 #define TEGRA_PRE_SI_DSIM_ASIM_LINSIM	U(6)
 #define TEGRA_PRE_SI_VDK		U(8)
 
-/*******************************************************************************
- * Tegra chip ID values
- ******************************************************************************/
-typedef enum tegra_chipid {
-	TEGRA_CHIPID_TEGRA13 = 0x13,
-	TEGRA_CHIPID_TEGRA21 = 0x21,
-	TEGRA_CHIPID_TEGRA18 = 0x18,
-} tegra_chipid_t;
-
 /*
  * Read the chip ID value
  */

plat/nvidia/tegra/include/tegra_platform.h

@@ -23,8 +23,17 @@
 #define PRE_SI_PLATFORM_SHIFT		U(0x14)
 #define PRE_SI_PLATFORM_MASK		U(0xF)
 
-/*
+/*******************************************************************************
  * Tegra chip ID values
+ ******************************************************************************/
+#define TEGRA_CHIPID_TEGRA13		U(0x13)
+#define TEGRA_CHIPID_TEGRA21		U(0x21)
+#define TEGRA_CHIPID_TEGRA18		U(0x18)
+
+#ifndef __ASSEMBLY__
+
+/*
+ * Tegra chip ID major/minor identifiers
  */
 uint32_t tegra_get_chipid_major(void);
 uint32_t tegra_get_chipid_minor(void);
@@ -49,4 +58,6 @@ bool tegra_platform_is_fpga(void);
 bool tegra_platform_is_unit_fpga(void);
 bool tegra_platform_is_virt_dev_kit(void);
 
+#endif /* __ASSEMBLY__ */
+
 #endif /* TEGRA_PLATFORM_H */