Fix wrong MIDR_EL1 value for Neoverse E1

Change-Id: I75ee39d78c81ecb528a671c0cfadfc2fe7b5d818 Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>

Fix wrong MIDR_EL1 value for Neoverse E1
Change-Id: I75ee39d78c81ecb528a671c0cfadfc2fe7b5d818 Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
c4187c9c · John Tsichritzis · 620d9832 · c4187c9c
Commit c4187c9c authored 6 years ago by John Tsichritzis
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--- a/include/lib/cpus/aarch64/neoverse_e1.h
+++ b/include/lib/cpus/aarch64/neoverse_e1.h
@@ -9,7 +9,7 @@
 #include <lib/utils_def.h>
-#define NEOVERSE_E1_MIDR		U(0x410FD060)
+#define NEOVERSE_E1_MIDR		U(0x410FD4A0)
 /*******************************************************************************
 * CPU Extended Control register specific definitions.