Commit c5346ed5 authored by Andre Przywara's avatar Andre Przywara
Browse files

arm_fpga: Predefine DTB and BL33 load addresses



The memory layout for the FPGA is fairly uniform for most of the FPGA
images, and we already assume that DRAM starts at 2GB by default.

Prepopulate PRELOADED_BL33_BASE and FPGA_PRELOADED_DTB_BASE to some
sane default values, to simplify building some stock image.
If people want to deviate from that, they can always override those
addresses on the make command line.

Change-Id: I2238fafb3f8253a01ad2d88d45827c141d9b29dd
Signed-off-by: default avatarAndre Przywara <andre.przywara@arm.com>
parent 2c13ef90
......@@ -24,15 +24,10 @@ ifeq (${TRUSTED_BOARD_BOOT}, 1)
$(error "TRUSTED_BOARD_BOOT must be disabled")
endif
ifndef PRELOADED_BL33_BASE
$(error "PRELOADED_BL33_BASE is not set")
endif
PRELOADED_BL33_BASE := 0x80080000
ifndef FPGA_PRELOADED_DTB_BASE
$(error "FPGA_PRELOADED_DTB_BASE is not set")
else
FPGA_PRELOADED_DTB_BASE := 0x80070000
$(eval $(call add_define,FPGA_PRELOADED_DTB_BASE))
endif
# Treating this as a memory-constrained port for now
USE_COHERENT_MEM := 0
......
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