Commit c8861f9f authored by Madhukar Pappireddy's avatar Madhukar Pappireddy Committed by TrustedFirmware Code Review
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Merge changes Iebb86a0b,I7fe63311 into integration

* changes:
  refactor(plat/nxp/lx216x): refine variable definition
  refactor(plat/nxp/lx216x): use common make variables
parents 8cf5afaf e4d0fa0b
...@@ -91,7 +91,7 @@ OCRAM_SIZE := 0x40000 ...@@ -91,7 +91,7 @@ OCRAM_SIZE := 0x40000
# Location of BL2 on OCRAM # Location of BL2 on OCRAM
BL2_BASE_ADDR := $(shell echo $$(( $(OCRAM_START_ADDR) + $(NXP_ROM_RSVD) + $(CSF_HDR_SZ) ))) BL2_BASE_ADDR := $(shell echo $$(( $(OCRAM_START_ADDR) + $(NXP_ROM_RSVD) + $(CSF_HDR_SZ) )))
# Covert to HEX to be used by create_pbl.mk # Covert to HEX to be used by create_pbl.mk
BL2_BASE := $$(echo "obase=16; ${BL2_BASE_ADDR}" | bc) BL2_BASE := $(shell echo "0x"$$(echo "obase=16; ${BL2_BASE_ADDR}" | bc))
# BL2_HDR_LOC is at (OCRAM_ADDR + NXP_ROM_RSVD) # BL2_HDR_LOC is at (OCRAM_ADDR + NXP_ROM_RSVD)
# This value BL2_HDR_LOC + CSF_HDR_SZ should not overalp with BL2_BASE # This value BL2_HDR_LOC + CSF_HDR_SZ should not overalp with BL2_BASE
...@@ -107,95 +107,5 @@ ERRATA_A72_859971 := 1 ...@@ -107,95 +107,5 @@ ERRATA_A72_859971 := 1
# SoC Errata # SoC Errata
ERRATA_SOC_A050426 := 1 ERRATA_SOC_A050426 := 1
ifneq (${CACHE_LINE},)
$(eval $(call add_define_val,PLATFORM_CACHE_LINE_SHIFT,${CACHE_LINE}))
$(eval CACHE_WRITEBACK_GRANULE=$(shell echo $$((1 << $(CACHE_LINE)))))
$(eval $(call add_define_val,CACHE_WRITEBACK_GRANULE,$(CACHE_WRITEBACK_GRANULE)))
endif
ifneq (${INTERCONNECT},)
$(eval $(call add_define,NXP_HAS_CCN508))
endif
ifneq (${CHASSIS},)
$(eval $(call add_define,CONFIG_CHASSIS_${CHASSIS}))
endif
ifneq (${PLAT_DDR_PHY},)
$(eval $(call add_define,NXP_DDR_${PLAT_DDR_PHY}))
endif
ifneq (${PHYS_SYS},)
$(eval $(call add_define,CONFIG_PHYS_64BIT))
endif
ifneq (${CSF_HDR_SZ},)
$(eval $(call add_define_val,CSF_HDR_SZ,${CSF_HDR_SZ}))
endif
ifneq (${OCRAM_START_ADDR},)
$(eval $(call add_define_val,NXP_OCRAM_ADDR,${OCRAM_START_ADDR}))
endif
ifneq (${OCRAM_SIZE},)
$(eval $(call add_define_val,NXP_OCRAM_SIZE,${OCRAM_SIZE}))
endif
ifneq (${NXP_ROM_RSVD},)
$(eval $(call add_define_val,NXP_ROM_RSVD,${NXP_ROM_RSVD}))
endif
ifneq (${BL2_BASE_ADDR},)
$(eval $(call add_define_val,BL2_BASE,${BL2_BASE_ADDR}))
endif
ifeq (${SEC_MEM_NON_COHERENT},yes)
$(eval $(call add_define,SEC_MEM_NON_COHERENT))
endif
ifneq (${NXP_ESDHC_ENDIANNESS},)
$(eval $(call add_define,NXP_ESDHC_${NXP_ESDHC_ENDIANNESS}))
endif
ifneq (${NXP_SFP_VER},)
$(eval $(call add_define,NXP_SFP_VER_${NXP_SFP_VER}))
endif
ifneq (${NXP_SFP_ENDIANNESS},)
$(eval $(call add_define,NXP_SFP_${NXP_SFP_ENDIANNESS}))
endif
ifneq (${NXP_GPIO_ENDIANNESS},)
$(eval $(call add_define,NXP_GPIO_${NXP_GPIO_ENDIANNESS}))
endif
ifneq (${NXP_SNVS_ENDIANNESS},)
$(eval $(call add_define,NXP_SNVS_${NXP_SNVS_ENDIANNESS}))
endif
ifneq (${NXP_GUR_ENDIANNESS},)
$(eval $(call add_define,NXP_GUR_${NXP_GUR_ENDIANNESS}))
endif
ifneq (${NXP_FSPI_ENDIANNESS},)
$(eval $(call add_define,NXP_FSPI_${NXP_FSPI_ENDIANNESS}))
endif
# enable dynamic memory mapping # enable dynamic memory mapping
PLAT_XLAT_TABLES_DYNAMIC := 1 PLAT_XLAT_TABLES_DYNAMIC := 1
ifneq (${NXP_SEC_ENDIANNESS},)
$(eval $(call add_define,NXP_SEC_${NXP_SEC_ENDIANNESS}))
endif
ifneq (${NXP_DDR_ENDIANNESS},)
$(eval $(call add_define,NXP_DDR_${NXP_DDR_ENDIANNESS}))
endif
ifneq (${NXP_DDR_INTLV_256B},)
$(eval $(call add_define,NXP_DDR_INTLV_256B))
endif
ifneq (${PLAT_XLAT_TABLES_DYNAMIC},)
$(eval $(call add_define,PLAT_XLAT_TABLES_DYNAMIC))
endif
...@@ -15,7 +15,7 @@ BOARD_PATH := ${PLAT_SOC_PATH}/${BOARD} ...@@ -15,7 +15,7 @@ BOARD_PATH := ${PLAT_SOC_PATH}/${BOARD}
# get SoC-specific defnitions # get SoC-specific defnitions
include ${PLAT_SOC_PATH}/soc.def include ${PLAT_SOC_PATH}/soc.def
include ${PLAT_COMMON_PATH}/plat_make_helper/soc_common_def.mk
include ${PLAT_COMMON_PATH}/plat_make_helper/plat_build_macros.mk include ${PLAT_COMMON_PATH}/plat_make_helper/plat_build_macros.mk
# SoC-specific # SoC-specific
......
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