Commit c8ab47d4 authored by Ryan Grachek's avatar Ryan Grachek
Browse files

hikey960: enable IOMCU DMAC



There exists a third DMA controller on the hi3660
SoC called the IOMCU DMAC. This controller is used by
peripherals like SPI2 and UART3. Initialize channels 4-7
as non-secure, while 0-3 remain reserved and secure.
Signed-off-by: default avatarRyan Grachek <ryan@edited.us>
parent 873e394b
......@@ -141,6 +141,21 @@ static void hikey960_edma_init(void)
}
}
static void hikey960_iomcu_dma_init(void)
{
int i;
uint32_t non_secure;
non_secure = IOMCU_DMAC_SEC_CTRL_INTR_SEC | IOMCU_DMAC_SEC_CTRL_GLOBAL_SEC;
mmio_write_32(IOMCU_DMAC_SEC_CTRL, non_secure);
/* channels 0-3 are reserved */
for (i = 4; i < IOMCU_DMAC_CHANNEL_NUMS; i++) {
mmio_write_32(IOMCU_DMAC_AXI_CONF(i), IOMCU_DMAC_AXI_CONF_ARPROT_NS |
IOMCU_DMAC_AXI_CONF_AWPROT_NS);
}
}
void bl31_platform_setup(void)
{
/* Initialize the GIC driver, cpu and distributor interfaces */
......@@ -150,6 +165,7 @@ void bl31_platform_setup(void)
gicv2_cpuif_enable();
hikey960_edma_init();
hikey960_iomcu_dma_init();
hisi_ipc_init();
}
......
......@@ -373,4 +373,13 @@
#define EDMAC_SEC_CTRL_GLOBAL_SEC (1 << 0)
#define EDMAC_CHANNEL_NUMS 16
#define IOMCU_DMAC_BASE 0xffd77000
#define IOMCU_DMAC_SEC_CTRL (IOMCU_DMAC_BASE + 0x694)
#define IOMCU_DMAC_AXI_CONF(x) (IOMCU_DMAC_BASE + 0x820 + ((x) << 6))
#define IOMCU_DMAC_AXI_CONF_ARPROT_NS (1 << 6)
#define IOMCU_DMAC_AXI_CONF_AWPROT_NS (1 << 18)
#define IOMCU_DMAC_SEC_CTRL_INTR_SEC (1 << 1)
#define IOMCU_DMAC_SEC_CTRL_GLOBAL_SEC (1 << 0)
#define IOMCU_DMAC_CHANNEL_NUMS 8
#endif /* HI3660_H */
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