Commit cdfbbfef authored by Konstantin Porotchkin's avatar Konstantin Porotchkin Committed by Marcin Wojtas
Browse files

plat: marvell: armada: re-enable BL32_BASE definition



As a preparation to support proper loading the OPTEE OS image,
enable the BL32 specific defines in case the SPD is used.

On the occasion move two BL32-related macros to marvell_def.h
and fix BL32_LIMIT definition.

Change-Id: Id4e2d81833bc1895650cca8b0fc0bfc341cf77f3
Signed-off-by: default avatarKonstantin Porotchkin <kostap@marvell.com>
Signed-off-by: default avatarMarcin Wojtas <mw@semihalf.com>
parent 814ce2f9
...@@ -173,5 +173,15 @@ ...@@ -173,5 +173,15 @@
#define BL31_LIMIT (MARVELL_BL_RAM_BASE + \ #define BL31_LIMIT (MARVELL_BL_RAM_BASE + \
MARVELL_BL_RAM_SIZE) MARVELL_BL_RAM_SIZE)
/*****************************************************************************
* BL32 specific defines.
*****************************************************************************
*/
#define BL32_BASE PLAT_MARVELL_TRUSTED_DRAM_BASE
#define BL32_LIMIT (BL32_BASE + PLAT_MARVELL_TRUSTED_DRAM_SIZE)
#ifdef SPD_none
#undef BL32_BASE
#endif /* SPD_none */
#endif /* MARVELL_DEF_H */ #endif /* MARVELL_DEF_H */
...@@ -177,5 +177,14 @@ ...@@ -177,5 +177,14 @@
#define BL31_LIMIT (MARVELL_BL_RAM_BASE + \ #define BL31_LIMIT (MARVELL_BL_RAM_BASE + \
MARVELL_BL_RAM_SIZE) MARVELL_BL_RAM_SIZE)
/*******************************************************************************
* BL32 specific defines.
******************************************************************************/
#define BL32_BASE PLAT_MARVELL_TRUSTED_DRAM_BASE
#define BL32_LIMIT (BL32_BASE + PLAT_MARVELL_TRUSTED_DRAM_SIZE)
#ifdef SPD_none
#undef BL32_BASE
#endif /* SPD_none */
#endif /* MARVELL_DEF_H */ #endif /* MARVELL_DEF_H */
...@@ -221,12 +221,4 @@ ...@@ -221,12 +221,4 @@
/* Securities */ /* Securities */
#define IRQ_SEC_OS_TICK_INT MARVELL_IRQ_SEC_PHY_TIMER #define IRQ_SEC_OS_TICK_INT MARVELL_IRQ_SEC_PHY_TIMER
#define TRUSTED_DRAM_BASE PLAT_MARVELL_TRUSTED_DRAM_BASE
#define TRUSTED_DRAM_SIZE PLAT_MARVELL_TRUSTED_DRAM_SIZE
#ifdef BL32
#define BL32_BASE TRUSTED_DRAM_BASE
#define BL32_LIMIT TRUSTED_DRAM_SIZE
#endif
#endif /* PLATFORM_DEF_H */ #endif /* PLATFORM_DEF_H */
...@@ -190,14 +190,6 @@ ...@@ -190,14 +190,6 @@
/* Securities */ /* Securities */
#define IRQ_SEC_OS_TICK_INT MARVELL_IRQ_SEC_PHY_TIMER #define IRQ_SEC_OS_TICK_INT MARVELL_IRQ_SEC_PHY_TIMER
#define TRUSTED_DRAM_BASE PLAT_MARVELL_TRUSTED_DRAM_BASE
#define TRUSTED_DRAM_SIZE PLAT_MARVELL_TRUSTED_DRAM_SIZE
#ifdef BL32
#define BL32_BASE TRUSTED_DRAM_BASE
#define BL32_LIMIT TRUSTED_DRAM_SIZE
#endif
#define MVEBU_PMU_IRQ_WA #define MVEBU_PMU_IRQ_WA
#endif /* PLATFORM_DEF_H */ #endif /* PLATFORM_DEF_H */
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