mediatek: mt8173: apply MULTI_CONSOLE framework

- Switch uart driver from Mediatek 8250 to TI 16550
- Enable MULTI_CONSOLE
Signed-off-by: kenny liang <kenny.liang@mediatek.com>
Change-Id: Ie3948d9e64d05d29a1f69592792e277b680c4ed4

plat/mediatek/mt8173/aarch64/plat_helpers.S

@@ -11,9 +11,6 @@
 	.globl	plat_report_exception
 	.globl	platform_is_primary_cpu
 	.globl  plat_my_core_pos
-	.globl	plat_crash_console_init
-	.globl	plat_crash_console_putc
-	.globl	plat_crash_console_flush
 
 	/* -----------------------------------------------------
 	 * void plat_secondary_cold_boot_setup (void);
@@ -50,42 +47,3 @@ func plat_my_core_pos
 	add     x0, x1, x0, LSR #6
 	ret
 endfunc plat_my_core_pos
-
-	/* ---------------------------------------------
-	 * int plat_crash_console_init(void)
-	 * Function to initialize the crash console
-	 * without a C Runtime to print crash report.
-	 * Clobber list : x0 - x4
-	 * ---------------------------------------------
-	 */
-func plat_crash_console_init
-	mov_imm	x0, MT8173_UART0_BASE
-	mov_imm	x1, MT8173_UART_CLOCK
-	mov_imm	x2, MT8173_BAUDRATE
-	b	console_core_init
-endfunc plat_crash_console_init
-
-	/* ---------------------------------------------
-	 * int plat_crash_console_putc(void)
-	 * Function to print a character on the crash
-	 * console without a C Runtime.
-	 * Clobber list : x1, x2
-	 * ---------------------------------------------
-	 */
-func plat_crash_console_putc
-	mov_imm x1, MT8173_UART0_BASE
-	b	console_core_putc
-endfunc plat_crash_console_putc
-
-	/* ---------------------------------------------
-	 * int plat_crash_console_flush(int c)
-	 * Function to force a write of all buffered
-	 * data that hasn't been output.
-	 * Out : return -1 on error else return 0.
-	 * Clobber list : x0, x1
-	 * ---------------------------------------------
-	 */
-func plat_crash_console_flush
-	mov_imm	x0, MT8173_UART0_BASE
-	b	console_core_flush
-endfunc plat_crash_console_flush

plat/mediatek/mt8173/bl31_plat_setup.c

@@ -9,8 +9,8 @@
 #include <common/bl_common.h>
 #include <common/debug.h>
 #include <common/desc_image_load.h>
-#include <drivers/console.h>
 #include <drivers/generic_delay_timer.h>
+#include <drivers/ti/uart/uart_16550.h>
 #include <lib/mmio.h>
 #include <plat/arm/common/plat_arm.h>
 #include <plat/common/common_def.h>
@@ -100,7 +100,9 @@ entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
 void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
 				u_register_t arg2, u_register_t arg3)
 {
-	console_init(MT8173_UART0_BASE, MT8173_UART_CLOCK, MT8173_BAUDRATE);
+	static console_16550_t console;
+
+	console_16550_register(MT8173_UART0_BASE, MT8173_UART_CLOCK, MT8173_BAUDRATE, &console);
 
 	VERBOSE("bl31_setup\n");
 

plat/mediatek/mt8173/plat_pm.c

@@ -11,7 +11,7 @@
 #include <common/debug.h>
 #include <drivers/arm/cci.h>
 #include <drivers/arm/gicv2.h>
-#include <drivers/console.h>
+#include <drivers/ti/uart/uart_16550.h>
 #include <lib/bakery_lock.h>
 #include <lib/mmio.h>
 #include <lib/psci/psci.h>
@@ -543,12 +543,14 @@ int plat_validate_power_state(unsigned int power_state,
 
 void mtk_system_pwr_domain_resume(void)
 {
-	console_init(MT8173_UART0_BASE, MT8173_UART_CLOCK, MT8173_BAUDRATE);
+	console_switch_state(CONSOLE_FLAG_BOOT);
 
 	/* Assert system power domain is available on the platform */
 	assert(PLAT_MAX_PWR_LVL >= MTK_PWR_LVL2);
 
 	plat_arm_gic_init();
+
+	console_switch_state(CONSOLE_FLAG_RUNTIME);
 }
 
 static const plat_psci_ops_t plat_plat_pm_ops = {

plat/mediatek/mt8173/platform.mk

@@ -8,7 +8,6 @@ MTK_PLAT		:=	plat/mediatek
 MTK_PLAT_SOC		:=	${MTK_PLAT}/${PLAT}
 
 PLAT_INCLUDES		:=	-I${MTK_PLAT}/common/				\
-				-I${MTK_PLAT}/common/drivers/uart/		\
 				-Iinclude/plat/arm/common/aarch64		\
 				-I${MTK_PLAT_SOC}/drivers/crypt/		\
 				-I${MTK_PLAT_SOC}/drivers/mtcmos/		\
@@ -21,21 +20,21 @@ PLAT_INCLUDES		:=	-I${MTK_PLAT}/common/				\
 PLAT_BL_COMMON_SOURCES	:=	lib/xlat_tables/xlat_tables_common.c		\
 				lib/xlat_tables/aarch64/xlat_tables.c		\
 				plat/arm/common/arm_gicv2.c			\
-				plat/common/plat_gicv2.c
+				plat/common/plat_gicv2.c			\
+				plat/common/aarch64/crash_console_helpers.S
 
 BL31_SOURCES		+=	common/desc_image_load.c			\
 				drivers/arm/cci/cci.c				\
 				drivers/arm/gic/common/gic_common.c		\
 				drivers/arm/gic/v2/gicv2_main.c			\
 				drivers/arm/gic/v2/gicv2_helpers.c		\
-				drivers/console/aarch64/console.S		\
 				drivers/delay_timer/delay_timer.c		\
 				drivers/delay_timer/generic_delay_timer.c	\
+				drivers/ti/uart/aarch64/16550_console.S		\
 				lib/cpus/aarch64/aem_generic.S			\
 				lib/cpus/aarch64/cortex_a53.S			\
 				lib/cpus/aarch64/cortex_a57.S			\
 				lib/cpus/aarch64/cortex_a72.S			\
-				${MTK_PLAT}/common/drivers/uart/8250_console.S	\
 				${MTK_PLAT}/common/mtk_plat_common.c		\
 				${MTK_PLAT}/common/mtk_sip_svc.c		\
 				${MTK_PLAT_SOC}/aarch64/plat_helpers.S		\
@@ -68,3 +67,5 @@ $(eval $(call add_define,MTK_SIP_SET_AUTHORIZED_SECURE_REG_ENABLE))
 
 # Do not enable SVE
 ENABLE_SVE_FOR_NS		:=	0
+
+MULTI_CONSOLE_API		:=	1