Merge changes from topic "rd_plat_variants" into integration

* changes:
  feat(board/rdn2): add support for variant 1 of rd-n2 platform
  feat(plat/sgi): introduce platform variant build option

docs/plat/arm/arm-build-options.rst

@@ -132,6 +132,12 @@ Arm CSS Platform-Specific Build Options
    valid value greater than 1, the platform code performs required configuration
    to support multi-chip operation.
 
+- ``CSS_SGI_PLATFORM_VARIANT``: Selects the variant of a SGI/RD platform. A
+    particular SGI/RD platform may have multiple variants which may differ in
+    core count, cluster count or other peripherals. This build option is used
+    to select the appropriate platform variant for the build. The range of
+    valid values is platform specific.
+
 --------------
 
 *Copyright (c) 2019-2021, Arm Limited. All rights reserved.*

plat/arm/board/rde1edge/platform.mk

@@ -58,4 +58,9 @@ ifneq ($(CSS_SGI_CHIP_COUNT),1)
    ${CSS_SGI_CHIP_COUNT}.")
 endif
 
+ifneq ($(CSS_SGI_PLATFORM_VARIANT),0)
+ $(error "CSS_SGI_PLATFORM_VARIANT for RD-E1-Edge should always be 0, \
+     currently set to ${CSS_SGI_PLATFORM_VARIANT}.")
+endif
+
 override CTX_INCLUDE_AARCH32_REGS	:= 0

plat/arm/board/rdn1edge/platform.mk

@@ -65,4 +65,9 @@ ifneq ($(CSS_SGI_CHIP_COUNT),$(filter $(CSS_SGI_CHIP_COUNT),$(SEQ)))
    set to ${CSS_SGI_CHIP_COUNT}.")
 endif
 
+ifneq ($(CSS_SGI_PLATFORM_VARIANT),0)
+ $(error "CSS_SGI_PLATFORM_VARIANT for RD-N1-Edge should always be 0, \
+     currently set to ${CSS_SGI_PLATFORM_VARIANT}.")
+endif
+
 override CTX_INCLUDE_AARCH32_REGS	:= 0

plat/arm/board/rdn2/include/platform_def.h

@@ -11,7 +11,12 @@
 
 #include <sgi_soc_platform_def_v2.h>
 
+#if (CSS_SGI_PLATFORM_VARIANT == 1)
+#define PLAT_ARM_CLUSTER_COUNT		U(8)
+#else
 #define PLAT_ARM_CLUSTER_COUNT		U(16)
+#endif
+
 #define CSS_SGI_MAX_CPUS_PER_CLUSTER	U(1)
 #define CSS_SGI_MAX_PE_PER_CPU		U(1)
 
@@ -26,7 +31,12 @@
 #define PLAT_ARM_TZC_FILTERS		TZC_400_REGION_ATTR_FILTER_BIT(0)
 
 #define TZC400_OFFSET			UL(0x1000000)
+
+#if (CSS_SGI_PLATFORM_VARIANT == 1)
+#define TZC400_COUNT			U(2)
+#else
 #define TZC400_COUNT			U(8)
+#endif
 
 #define TZC400_BASE(n)			(PLAT_ARM_TZC_BASE + \
 						(n * TZC400_OFFSET))
@@ -60,6 +70,11 @@
 /* GIC related constants */
 #define PLAT_ARM_GICD_BASE		UL(0x30000000)
 #define PLAT_ARM_GICC_BASE		UL(0x2C000000)
+
+#if (CSS_SGI_PLATFORM_VARIANT == 1)
+#define PLAT_ARM_GICR_BASE		UL(0x30100000)
+#else
 #define PLAT_ARM_GICR_BASE		UL(0x301C0000)
+#endif
 
 #endif /* PLATFORM_DEF_H */

plat/arm/board/rdn2/platform.mk

@@ -58,3 +58,10 @@ $(eval $(call TOOL_ADD_PAYLOAD,${NT_FW_CONFIG},--nt-fw-config))
 
 override CTX_INCLUDE_AARCH32_REGS	:= 0
 override ENABLE_AMU			:= 1
+
+RD_N2_VARIANTS	:= 0 1
+ifneq ($(CSS_SGI_PLATFORM_VARIANT),\
+	$(filter $(CSS_SGI_PLATFORM_VARIANT),$(RD_N2_VARIANTS)))
+ $(error "CSS_SGI_PLATFORM_VARIANT for RD-N2 should be 0 or 1, currently set \
+     to ${CSS_SGI_PLATFORM_VARIANT}.")
+endif

plat/arm/board/rdn2/rdn2_topology.c

@@ -20,6 +20,7 @@ const unsigned char rd_n2_pd_tree_desc[] = {
 	CSS_SGI_MAX_CPUS_PER_CLUSTER,
 	CSS_SGI_MAX_CPUS_PER_CLUSTER,
 	CSS_SGI_MAX_CPUS_PER_CLUSTER,
+#if (CSS_SGI_PLATFORM_VARIANT == 0)
 	CSS_SGI_MAX_CPUS_PER_CLUSTER,
 	CSS_SGI_MAX_CPUS_PER_CLUSTER,
 	CSS_SGI_MAX_CPUS_PER_CLUSTER,
@@ -28,6 +29,7 @@ const unsigned char rd_n2_pd_tree_desc[] = {
 	CSS_SGI_MAX_CPUS_PER_CLUSTER,
 	CSS_SGI_MAX_CPUS_PER_CLUSTER,
 	CSS_SGI_MAX_CPUS_PER_CLUSTER,
+#endif
 };
 
 /*******************************************************************************
@@ -51,6 +53,7 @@ const uint32_t plat_css_core_pos_to_scmi_dmn_id_map[] = {
 	(SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x5)),
 	(SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x6)),
 	(SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x7)),
+#if (CSS_SGI_PLATFORM_VARIANT == 0)
 	(SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x8)),
 	(SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x9)),
 	(SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0xA)),
@@ -59,4 +62,5 @@ const uint32_t plat_css_core_pos_to_scmi_dmn_id_map[] = {
 	(SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0xD)),
 	(SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0xE)),
 	(SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0xF)),
+#endif
 };

plat/arm/board/rdv1/platform.mk

@@ -58,3 +58,8 @@ $(eval $(call TOOL_ADD_PAYLOAD,${NT_FW_CONFIG},--nt-fw-config,${NT_FW_CONFIG}))
 
 override CTX_INCLUDE_AARCH32_REGS	:= 0
 override ENABLE_AMU			:= 1
+
+ifneq ($(CSS_SGI_PLATFORM_VARIANT),0)
+ $(error "CSS_SGI_PLATFORM_VARIANT for RD-V1 should always be 0, \
+     currently set to ${CSS_SGI_PLATFORM_VARIANT}.")
+endif

plat/arm/board/rdv1mc/platform.mk

@@ -68,3 +68,8 @@ NT_FW_CONFIG		:=	${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb
 $(eval $(call TOOL_ADD_PAYLOAD,${NT_FW_CONFIG},--nt-fw-config,${NT_FW_CONFIG}))
 
 override CTX_INCLUDE_AARCH32_REGS	:= 0
+
+ifneq ($(CSS_SGI_PLATFORM_VARIANT),0)
+ $(error "CSS_SGI_PLATFORM_VARIANT for RD-V1-MC should always be 0, \
+     currently set to ${CSS_SGI_PLATFORM_VARIANT}.")
+endif

plat/arm/board/sgi575/platform.mk

@@ -58,3 +58,8 @@ ifneq ($(CSS_SGI_CHIP_COUNT),1)
  $(error  "Chip count for SGI575 should be 1, currently set to \
    ${CSS_SGI_CHIP_COUNT}.")
 endif
+
+ifneq ($(CSS_SGI_PLATFORM_VARIANT),0)
+ $(error "CSS_SGI_PLATFORM_VARIANT for SGI575 should always be 0,\
+     currently set to ${CSS_SGI_PLATFORM_VARIANT}.")
+endif

plat/arm/css/sgi/include/sgi_variant.h

@@ -20,6 +20,9 @@
 /* SID Version values for RD-N2 */
 #define RD_N2_SID_VER_PART_NUM			0x07B7
 
+/* SID Version values for RD-N2 variants */
+#define RD_N2_CFG1_SID_VER_PART_NUM		0x07B6
+
 /* Structure containing SGI platform variant information */
 typedef struct sgi_platform_info {
 	unsigned int platform_id;	/* Part Number of the platform */

plat/arm/css/sgi/sgi-common.mk

@@ -18,6 +18,8 @@ HANDLE_EA_EL3_FIRST		:=	0
 
 CSS_SGI_CHIP_COUNT		:=	1
 
+CSS_SGI_PLATFORM_VARIANT	:=	0
+
 INTERCONNECT_SOURCES	:=	${CSS_ENT_BASE}/sgi_interconnect.c
 
 PLAT_INCLUDES		+=	-I${CSS_ENT_BASE}/include
@@ -57,6 +59,8 @@ $(eval $(call add_define,SGI_PLAT))
 
 $(eval $(call add_define,CSS_SGI_CHIP_COUNT))
 
+$(eval $(call add_define,CSS_SGI_PLATFORM_VARIANT))
+
 override CSS_LOAD_SCP_IMAGES	:=	0
 override NEED_BL2U		:=	no
 override ARM_BL31_IN_DRAM	:=	1

plat/arm/css/sgi/sgi_bl31_setup.c

@@ -75,7 +75,8 @@ scmi_channel_plat_info_t *plat_css_get_scmi_info(int channel_id)
 {
 	if (sgi_plat_info.platform_id == RD_N1E1_EDGE_SID_VER_PART_NUM ||
 		sgi_plat_info.platform_id == RD_V1_SID_VER_PART_NUM ||
-		sgi_plat_info.platform_id == RD_N2_SID_VER_PART_NUM) {
+		sgi_plat_info.platform_id == RD_N2_SID_VER_PART_NUM ||
+		sgi_plat_info.platform_id == RD_N2_CFG1_SID_VER_PART_NUM) {
 		if (channel_id >= ARRAY_SIZE(plat_rd_scmi_info))
 			panic();
 		return &plat_rd_scmi_info[channel_id];