Commit d38613df authored by Soby Mathew's avatar Soby Mathew Committed by TrustedFirmware Code Review
Browse files

Merge changes I0d17ba6c,I540741d2,I9e6475ad,Ifd769320,I12c04a85, ... into integration

* changes:
  plat/mediatek/mt81*: Use new bl31_params_parse() helper
  plat/rockchip: Use new bl31_params_parse_helper()
  Add helper to parse BL31 parameters (both versions)
  Factor out cross-BL API into export headers suitable for 3rd party code
  Use explicit-width data types in AAPCS parameter structs
  plat/rockchip: Switch to use new common BL aux parameter library
  Introduce lightweight BL platform parameter library
parents 8b6394c9 cbdc72b5
/*
* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
......@@ -8,6 +8,7 @@
#include <common/bl_common.h>
#include <common/debug.h>
#include <common/desc_image_load.h>
#include <drivers/console.h>
#include <drivers/generic_delay_timer.h>
#include <lib/mmio.h>
......@@ -79,6 +80,7 @@ entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
entry_point_info_t *next_image_info;
next_image_info = (type == NON_SECURE) ? &bl33_ep_info : &bl32_ep_info;
assert(next_image_info->h.type == PARAM_EP);
/* None of the images on this platform can have 0x0 as the entrypoint */
if (next_image_info->pc)
......@@ -98,18 +100,11 @@ entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
u_register_t arg2, u_register_t arg3)
{
struct mtk_bl31_params *arg_from_bl2 = (struct mtk_bl31_params *)arg0;
console_init(MT8173_UART0_BASE, MT8173_UART_CLOCK, MT8173_BAUDRATE);
VERBOSE("bl31_setup\n");
assert(arg_from_bl2 != NULL);
assert(arg_from_bl2->h.type == PARAM_BL31);
assert(arg_from_bl2->h.version >= VERSION_1);
bl32_ep_info = *arg_from_bl2->bl32_ep_info;
bl33_ep_info = *arg_from_bl2->bl33_ep_info;
bl31_params_parse_helper(arg0, &bl32_ep_info, &bl33_ep_info);
}
/*******************************************************************************
......
......@@ -23,7 +23,8 @@ PLAT_BL_COMMON_SOURCES := lib/xlat_tables/xlat_tables_common.c \
plat/arm/common/arm_gicv2.c \
plat/common/plat_gicv2.c
BL31_SOURCES += drivers/arm/cci/cci.c \
BL31_SOURCES += common/desc_image_load.c \
drivers/arm/cci/cci.c \
drivers/arm/gic/common/gic_common.c \
drivers/arm/gic/v2/gicv2_main.c \
drivers/arm/gic/v2/gicv2_helpers.c \
......
......@@ -7,6 +7,7 @@
#include <assert.h>
#include <arch_helpers.h>
#include <common/bl_common.h>
#include <common/desc_image_load.h>
#include <plat/common/common_def.h>
#include <drivers/console.h>
#include <common/debug.h>
......@@ -50,6 +51,7 @@ entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
entry_point_info_t *next_image_info;
next_image_info = (type == NON_SECURE) ? &bl33_ep_info : &bl32_ep_info;
assert(next_image_info->h.type == PARAM_EP);
/* None of the images on this platform can have 0x0 as the entrypoint */
if (next_image_info->pc)
......@@ -69,19 +71,13 @@ entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
u_register_t arg2, u_register_t arg3)
{
struct mtk_bl31_params *arg_from_bl2 = (struct mtk_bl31_params *)arg0;
static console_16550_t console;
console_16550_register(UART0_BASE, UART_CLOCK, UART_BAUDRATE, &console);
NOTICE("MT8183 bl31_setup\n");
assert(arg_from_bl2 != NULL);
assert(arg_from_bl2->h.type == PARAM_BL31);
assert(arg_from_bl2->h.version >= VERSION_1);
bl32_ep_info = *arg_from_bl2->bl32_ep_info;
bl33_ep_info = *arg_from_bl2->bl33_ep_info;
bl31_params_parse_helper(arg0, &bl32_ep_info, &bl33_ep_info);
}
......
......@@ -16,7 +16,8 @@ PLAT_BL_COMMON_SOURCES := lib/xlat_tables/aarch64/xlat_tables.c \
plat/common/plat_psci_common.c \
plat/common/aarch64/crash_console_helpers.S
BL31_SOURCES += drivers/arm/cci/cci.c \
BL31_SOURCES += common/desc_image_load.c \
drivers/arm/cci/cci.c \
drivers/arm/gic/common/gic_common.c \
drivers/arm/gic/v3/arm_gicv3_common.c \
drivers/arm/gic/v3/gicv3_helpers.c \
......
/*
* Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
......@@ -10,6 +10,7 @@
#include <common/bl_common.h>
#include <common/debug.h>
#include <common/desc_image_load.h>
#include <drivers/console.h>
#include <drivers/generic_delay_timer.h>
#include <drivers/ti/uart/uart_16550.h>
......@@ -32,6 +33,7 @@ entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
entry_point_info_t *next_image_info;
next_image_info = (type == NON_SECURE) ? &bl33_ep_info : &bl32_ep_info;
assert(next_image_info->h.type == PARAM_EP);
/* None of the images on this platform can have 0x0 as the entrypoint */
if (next_image_info->pc)
......@@ -41,7 +43,7 @@ entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
}
#pragma weak params_early_setup
void params_early_setup(void *plat_param_from_bl2)
void params_early_setup(u_register_t plat_param_from_bl2)
{
}
......@@ -57,10 +59,8 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
u_register_t arg2, u_register_t arg3)
{
static console_16550_t console;
struct rockchip_bl31_params *arg_from_bl2 = (struct rockchip_bl31_params *) arg0;
void *plat_params_from_bl2 = (void *) arg1;
params_early_setup(plat_params_from_bl2);
params_early_setup(arg1);
#if COREBOOT
if (coreboot_serial.type)
......@@ -75,14 +75,7 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
VERBOSE("bl31_setup\n");
/* Passing a NULL context is a critical programming error */
assert(arg_from_bl2);
assert(arg_from_bl2->h.type == PARAM_BL31);
assert(arg_from_bl2->h.version >= VERSION_1);
bl32_ep_info = *arg_from_bl2->bl32_ep_info;
bl33_ep_info = *arg_from_bl2->bl33_ep_info;
bl31_params_parse_helper(arg0, &bl32_ep_info, &bl33_ep_info);
}
/*******************************************************************************
......
/*
* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
......@@ -9,90 +9,6 @@
#include <stdint.h>
/*
* We defined several plat parameter structs for BL2 to pass platform related
* parameters to Rockchip BL31 platform code. All plat parameters start with
* a common header, which has a type field to indicate the parameter type, and
* a next pointer points to next parameter. If the parameter is the last one in
* the list, next pointer will points to NULL. After the header comes the
* variable-sized members that describe the parameter. The picture below shows
* how the parameters are kept in memory.
*
* head of list ---> +----------------+ --+
* | type | |
* +----------------+ |--> struct bl31_plat_param
* +----| next | |
* | +----------------+ --+
* | | parameter data |
* | +----------------+
* |
* +--> +----------------+ --+
* | type | |
* +----------------+ |--> struct bl31_plat_param
* NULL <---| next | |
* +----------------+ --+
* | parameter data |
* +----------------+
*
* Note: The SCTLR_EL3.A bit (Alignment fault check enable) of ARM TF is set,
* so be sure each parameter struct starts on 64-bit aligned address. If not,
* alignment fault will occur during accessing its data member.
*/
#define BL31_GPIO_DIR_OUT 0
#define BL31_GPIO_DIR_IN 1
#define BL31_GPIO_LEVEL_LOW 0
#define BL31_GPIO_LEVEL_HIGH 1
#define BL31_GPIO_PULL_NONE 0
#define BL31_GPIO_PULL_UP 1
#define BL31_GPIO_PULL_DOWN 2
/* param type */
enum {
PARAM_NONE = 0,
PARAM_RESET,
PARAM_POWEROFF,
PARAM_SUSPEND_GPIO,
PARAM_SUSPEND_APIO,
PARAM_COREBOOT_TABLE,
};
struct apio_info {
uint8_t apio1 : 1;
uint8_t apio2 : 1;
uint8_t apio3 : 1;
uint8_t apio4 : 1;
uint8_t apio5 : 1;
};
struct gpio_info {
uint8_t polarity;
uint8_t direction;
uint8_t pull_mode;
uint32_t index;
};
/* common header for all plat parameter type */
struct bl31_plat_param {
uint64_t type;
void *next;
};
struct bl31_gpio_param {
struct bl31_plat_param h;
struct gpio_info gpio;
};
struct bl31_apio_param {
struct bl31_plat_param h;
struct apio_info apio;
};
struct bl31_u64_param {
struct bl31_plat_param h;
uint64_t value;
};
#include <export/plat/rockchip/common/plat_params_exp.h>
#endif /* PLAT_PARAMS_H */
/*
* Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2014-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
......@@ -14,6 +14,7 @@
#include <lib/psci/psci.h>
#include <lib/xlat_tables/xlat_tables.h>
#include <lib/mmio.h>
#include <plat_params.h>
#define __sramdata __attribute__((section(".sram.data")))
#define __sramconst __attribute__((section(".sram.rodata")))
......@@ -30,15 +31,6 @@ extern uint32_t __bl31_sram_text_real_end, __bl31_sram_data_real_end;
extern uint32_t __sram_incbin_start, __sram_incbin_end;
extern uint32_t __sram_incbin_real_end;
struct rockchip_bl31_params {
param_header_t h;
image_info_t *bl31_image_info;
entry_point_info_t *bl32_ep_info;
image_info_t *bl32_image_info;
entry_point_info_t *bl33_ep_info;
image_info_t *bl33_image_info;
};
/******************************************************************************
* The register have write-mask bits, it is mean, if you want to set the bits,
* you needs set the write-mask bits at the same time,
......@@ -94,7 +86,7 @@ void plat_cci_disable(void);
void plat_delay_timer_init(void);
void params_early_setup(void *plat_params_from_bl2);
void params_early_setup(u_register_t plat_params_from_bl2);
void plat_rockchip_gic_driver_init(void);
void plat_rockchip_gic_init(void);
......@@ -108,10 +100,10 @@ uintptr_t plat_get_sec_entrypoint(void);
void platform_cpu_warmboot(void);
struct gpio_info *plat_get_rockchip_gpio_reset(void);
struct gpio_info *plat_get_rockchip_gpio_poweroff(void);
struct gpio_info *plat_get_rockchip_suspend_gpio(uint32_t *count);
struct apio_info *plat_get_rockchip_suspend_apio(void);
struct bl_aux_gpio_info *plat_get_rockchip_gpio_reset(void);
struct bl_aux_gpio_info *plat_get_rockchip_gpio_poweroff(void);
struct bl_aux_gpio_info *plat_get_rockchip_suspend_gpio(uint32_t *count);
struct bl_aux_rk_apio_info *plat_get_rockchip_suspend_apio(void);
void plat_rockchip_gpio_init(void);
void plat_rockchip_save_gpio(void);
void plat_rockchip_restore_gpio(void);
......
/*
* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
......@@ -8,6 +8,7 @@
#include <errno.h>
#include <string.h>
#include <lib/bl_aux_params/bl_aux_params.h>
#include <common/bl_common.h>
#include <common/debug.h>
#include <drivers/console.h>
......@@ -20,14 +21,11 @@
#include <plat_params.h>
#include <plat_private.h>
static struct gpio_info param_reset;
static struct gpio_info param_poweroff;
static struct bl31_apio_param param_apio;
static struct gpio_info *rst_gpio;
static struct gpio_info *poweroff_gpio;
static struct gpio_info suspend_gpio[10];
static struct bl_aux_gpio_info rst_gpio;
static struct bl_aux_gpio_info poweroff_gpio;
static struct bl_aux_gpio_info suspend_gpio[10];
uint32_t suspend_gpio_cnt;
static struct apio_info *suspend_apio;
static struct bl_aux_rk_apio_info suspend_apio;
static uint32_t rk_uart_base = PLAT_RK_UART_BASE;
uint32_t rockchip_get_uart_base(void)
......@@ -36,7 +34,7 @@ uint32_t rockchip_get_uart_base(void)
}
#if COREBOOT
static int dt_process_fdt(void *blob)
static int dt_process_fdt(u_register_t param_from_bl2)
{
return -ENODEV;
}
......@@ -105,12 +103,12 @@ static void plat_rockchip_dt_process_fdt_uart(void *fdt)
rk_uart_base = uart_base;
}
static int dt_process_fdt(void *blob)
static int dt_process_fdt(u_register_t param_from_bl2)
{
void *fdt = plat_get_fdt();
int ret;
ret = fdt_open_into(blob, fdt, 0x10000);
ret = fdt_open_into((void *)param_from_bl2, fdt, 0x10000);
if (ret < 0)
return ret;
......@@ -120,33 +118,56 @@ static int dt_process_fdt(void *blob)
}
#endif
struct gpio_info *plat_get_rockchip_gpio_reset(void)
struct bl_aux_gpio_info *plat_get_rockchip_gpio_reset(void)
{
return rst_gpio;
return &rst_gpio;
}
struct gpio_info *plat_get_rockchip_gpio_poweroff(void)
struct bl_aux_gpio_info *plat_get_rockchip_gpio_poweroff(void)
{
return poweroff_gpio;
return &poweroff_gpio;
}
struct gpio_info *plat_get_rockchip_suspend_gpio(uint32_t *count)
struct bl_aux_gpio_info *plat_get_rockchip_suspend_gpio(uint32_t *count)
{
*count = suspend_gpio_cnt;
return &suspend_gpio[0];
}
struct apio_info *plat_get_rockchip_suspend_apio(void)
struct bl_aux_rk_apio_info *plat_get_rockchip_suspend_apio(void)
{
return suspend_apio;
return &suspend_apio;
}
void params_early_setup(void *plat_param_from_bl2)
static bool rk_aux_param_handler(struct bl_aux_param_header *param)
{
struct bl31_plat_param *bl2_param;
struct bl31_gpio_param *gpio_param;
/* Store platform parameters for later processing if needed. */
switch (param->type) {
case BL_AUX_PARAM_RK_RESET_GPIO:
rst_gpio = ((struct bl_aux_param_gpio *)param)->gpio;
return true;
case BL_AUX_PARAM_RK_POWEROFF_GPIO:
poweroff_gpio = ((struct bl_aux_param_gpio *)param)->gpio;
return true;
case BL_AUX_PARAM_RK_SUSPEND_GPIO:
if (suspend_gpio_cnt >= ARRAY_SIZE(suspend_gpio)) {
ERROR("Exceeded the supported suspend GPIO number.\n");
return true;
}
suspend_gpio[suspend_gpio_cnt++] =
((struct bl_aux_param_gpio *)param)->gpio;
return true;
case BL_AUX_PARAM_RK_SUSPEND_APIO:
suspend_apio = ((struct bl_aux_param_rk_apio *)param)->apio;
return true;
}
return false;
}
void params_early_setup(u_register_t plat_param_from_bl2)
{
/*
* Test if this is a FDT passed as a platform-specific parameter
* block.
......@@ -154,49 +175,5 @@ void params_early_setup(void *plat_param_from_bl2)
if (!dt_process_fdt(plat_param_from_bl2))
return;
/* keep plat parameters for later processing if need */
bl2_param = (struct bl31_plat_param *)plat_param_from_bl2;
while (bl2_param) {
switch (bl2_param->type) {
case PARAM_RESET:
gpio_param = (struct bl31_gpio_param *)bl2_param;
memcpy(&param_reset, &gpio_param->gpio,
sizeof(struct gpio_info));
rst_gpio = &param_reset;
break;
case PARAM_POWEROFF:
gpio_param = (struct bl31_gpio_param *)bl2_param;
memcpy(&param_poweroff, &gpio_param->gpio,
sizeof(struct gpio_info));
poweroff_gpio = &param_poweroff;
break;
case PARAM_SUSPEND_GPIO:
if (suspend_gpio_cnt >= ARRAY_SIZE(suspend_gpio)) {
ERROR("exceed support suspend gpio number\n");
break;
}
gpio_param = (struct bl31_gpio_param *)bl2_param;
memcpy(&suspend_gpio[suspend_gpio_cnt],
&gpio_param->gpio,
sizeof(struct gpio_info));
suspend_gpio_cnt++;
break;
case PARAM_SUSPEND_APIO:
memcpy(&param_apio, bl2_param,
sizeof(struct bl31_apio_param));
suspend_apio = &param_apio.apio;
break;
#if COREBOOT
case PARAM_COREBOOT_TABLE:
coreboot_table_setup((void *)
((struct bl31_u64_param *)bl2_param)->value);
break;
#endif
default:
ERROR("not expected type found %lld\n",
bl2_param->type);
break;
}
bl2_param = bl2_param->next;
}
bl_aux_params_parse(plat_param_from_bl2, rk_aux_param_handler);
}
/*
* Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
......@@ -11,6 +11,7 @@
#include <arch_helpers.h>
#include <common/bl_common.h>
#include <common/debug.h>
#include <common/desc_image_load.h>
#include <drivers/console.h>
#include <drivers/generic_delay_timer.h>
#include <drivers/ti/uart/uart_16550.h>
......@@ -40,7 +41,7 @@ entry_point_info_t *sp_min_plat_get_bl33_ep_info(void)
}
#pragma weak params_early_setup
void params_early_setup(void *plat_param_from_bl2)
void params_early_setup(u_register_t plat_param_from_bl2)
{
}
......@@ -53,10 +54,8 @@ void sp_min_early_platform_setup2(u_register_t arg0, u_register_t arg1,
u_register_t arg2, u_register_t arg3)
{
static console_16550_t console;
struct rockchip_bl31_params *arg_from_bl2 = (struct rockchip_bl31_params *) arg0;
void *plat_params_from_bl2 = (void *) arg1;
params_early_setup(plat_params_from_bl2);
params_early_setup(arg1);
#if COREBOOT
if (coreboot_serial.type)
......@@ -70,13 +69,7 @@ void sp_min_early_platform_setup2(u_register_t arg0, u_register_t arg1,
#endif
VERBOSE("sp_min_setup\n");
/* Passing a NULL context is a critical programming error */
assert(arg_from_bl2);
assert(arg_from_bl2->h.type == PARAM_BL31);
assert(arg_from_bl2->h.version >= VERSION_1);
bl33_ep_info = *arg_from_bl2->bl33_ep_info;
bl31_params_parse_helper(arg0, NULL, &bl33_ep_info);
}
/*******************************************************************************
......
#
# Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
# Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
......@@ -30,7 +30,9 @@ RK_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \
plat/common/plat_gicv2.c \
${RK_PLAT}/common/rockchip_gicv2.c
PLAT_BL_COMMON_SOURCES := plat/common/aarch32/crash_console_helpers.S \
PLAT_BL_COMMON_SOURCES := common/desc_image_load.c \
lib/bl_aux_params/bl_aux_params.c \
plat/common/aarch32/crash_console_helpers.S \
plat/common/plat_psci_common.c
PLAT_BL_COMMON_SOURCES += lib/xlat_tables/xlat_tables_common.c \
......
#
# Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
# Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
......@@ -28,7 +28,9 @@ RK_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \
plat/common/plat_gicv2.c \
${RK_PLAT}/common/rockchip_gicv2.c
PLAT_BL_COMMON_SOURCES := lib/xlat_tables/aarch64/xlat_tables.c \
PLAT_BL_COMMON_SOURCES := common/desc_image_load.c \
lib/bl_aux_params/bl_aux_params.c \
lib/xlat_tables/aarch64/xlat_tables.c \
lib/xlat_tables/xlat_tables_common.c \
plat/common/aarch64/crash_console_helpers.S \
plat/common/plat_psci_common.c
......
#
# Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
# Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
......@@ -26,7 +26,9 @@ RK_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \
plat/common/plat_gicv2.c \
${RK_PLAT}/common/rockchip_gicv2.c
PLAT_BL_COMMON_SOURCES := lib/xlat_tables/xlat_tables_common.c \
PLAT_BL_COMMON_SOURCES := common/desc_image_load.c \
lib/bl_aux_params/bl_aux_params.c \
lib/xlat_tables/xlat_tables_common.c \
lib/xlat_tables/aarch64/xlat_tables.c \
plat/common/aarch64/crash_console_helpers.S \
plat/common/plat_psci_common.c
......
/*
* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
......@@ -890,7 +890,7 @@ static uint32_t gpio_2_4_clk_gate;
static void suspend_apio(void)
{
struct apio_info *suspend_apio;
struct bl_aux_rk_apio_info *suspend_apio;
int i;
suspend_apio = plat_get_rockchip_suspend_apio();
......@@ -1010,7 +1010,7 @@ static void suspend_apio(void)
static void resume_apio(void)
{
struct apio_info *suspend_apio;
struct bl_aux_rk_apio_info *suspend_apio;
int i;
suspend_apio = plat_get_rockchip_suspend_apio();
......@@ -1038,7 +1038,7 @@ static void resume_apio(void)
static void suspend_gpio(void)
{
struct gpio_info *suspend_gpio;
struct bl_aux_gpio_info *suspend_gpio;
uint32_t count;
int i;
......@@ -1053,7 +1053,7 @@ static void suspend_gpio(void)
static void resume_gpio(void)
{
struct gpio_info *suspend_gpio;
struct bl_aux_gpio_info *suspend_gpio;
uint32_t count;
int i;
......@@ -1491,7 +1491,7 @@ int rockchip_soc_sys_pwr_dm_resume(void)
void __dead2 rockchip_soc_soft_reset(void)
{
struct gpio_info *rst_gpio;
struct bl_aux_gpio_info *rst_gpio;
rst_gpio = plat_get_rockchip_gpio_reset();
......@@ -1508,7 +1508,7 @@ void __dead2 rockchip_soc_soft_reset(void)
void __dead2 rockchip_soc_system_off(void)
{
struct gpio_info *poweroff_gpio;
struct bl_aux_gpio_info *poweroff_gpio;
poweroff_gpio = plat_get_rockchip_gpio_poweroff();
......
/*
* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
......
#
# Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
# Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
......@@ -32,7 +32,9 @@ RK_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \
plat/common/plat_gicv3.c \
${RK_PLAT}/common/rockchip_gicv3.c
PLAT_BL_COMMON_SOURCES := lib/xlat_tables/xlat_tables_common.c \
PLAT_BL_COMMON_SOURCES := common/desc_image_load.c \
lib/bl_aux_params/bl_aux_params.c \
lib/xlat_tables/xlat_tables_common.c \
lib/xlat_tables/aarch64/xlat_tables.c \
plat/common/aarch64/crash_console_helpers.S \
plat/common/plat_psci_common.c
......
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