Commit db7571a2 authored by Madhukar Pappireddy's avatar Madhukar Pappireddy Committed by TrustedFirmware Code Review
Browse files

Merge changes from topic "zynqmp-update-pinctrl-api" into integration

* changes:
  zynqmp: pm: Reimplement pinctrl get/set config parameter EEMI API calls
  zynqmp: pm: Reimplement pinctrl set/get function EEMI API
  zynqmp: pm: Implement pinctrl request/release EEMI API
  zynqmp: pm: Update return type in query functions
parents dea59794 95c3ebcb
...@@ -2446,7 +2446,7 @@ enum pm_ret_status pm_api_clock_get_num_clocks(unsigned int *nclocks) ...@@ -2446,7 +2446,7 @@ enum pm_ret_status pm_api_clock_get_num_clocks(unsigned int *nclocks)
* *
* @return Returns success. In case of error, name data is 0. * @return Returns success. In case of error, name data is 0.
*/ */
enum pm_ret_status pm_api_clock_get_name(unsigned int clock_id, char *name) void pm_api_clock_get_name(unsigned int clock_id, char *name)
{ {
if (clock_id == CLK_MAX) if (clock_id == CLK_MAX)
memcpy(name, END_OF_CLK, sizeof(END_OF_CLK) > CLK_NAME_LEN ? memcpy(name, END_OF_CLK, sizeof(END_OF_CLK) > CLK_NAME_LEN ?
...@@ -2458,8 +2458,6 @@ enum pm_ret_status pm_api_clock_get_name(unsigned int clock_id, char *name) ...@@ -2458,8 +2458,6 @@ enum pm_ret_status pm_api_clock_get_name(unsigned int clock_id, char *name)
else else
memcpy(name, ext_clocks[clock_id - CLK_MAX_OUTPUT_CLK].name, memcpy(name, ext_clocks[clock_id - CLK_MAX_OUTPUT_CLK].name,
CLK_NAME_LEN); CLK_NAME_LEN);
return PM_RET_SUCCESS;
} }
/** /**
......
/* /*
* Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
...@@ -294,7 +294,7 @@ struct pm_pll *pm_clock_get_pll(enum clock_id clock_id); ...@@ -294,7 +294,7 @@ struct pm_pll *pm_clock_get_pll(enum clock_id clock_id);
struct pm_pll *pm_clock_get_pll_by_related_clk(enum clock_id clock_id); struct pm_pll *pm_clock_get_pll_by_related_clk(enum clock_id clock_id);
uint8_t pm_clock_has_div(unsigned int clock_id, enum pm_clock_div_id div_id); uint8_t pm_clock_has_div(unsigned int clock_id, enum pm_clock_div_id div_id);
enum pm_ret_status pm_api_clock_get_name(unsigned int clock_id, char *name); void pm_api_clock_get_name(unsigned int clock_id, char *name);
enum pm_ret_status pm_api_clock_get_num_clocks(unsigned int *nclocks); enum pm_ret_status pm_api_clock_get_num_clocks(unsigned int *nclocks);
enum pm_ret_status pm_api_clock_get_topology(unsigned int clock_id, enum pm_ret_status pm_api_clock_get_topology(unsigned int clock_id,
unsigned int index, unsigned int index,
......
...@@ -19,39 +19,6 @@ ...@@ -19,39 +19,6 @@
#include "pm_common.h" #include "pm_common.h"
#include "pm_ipi.h" #include "pm_ipi.h"
#define PINCTRL_FUNCTION_MASK U(0xFE)
#define PINCTRL_VOLTAGE_STATUS_MASK U(0x01)
#define NFUNCS_PER_PIN U(13)
#define PINCTRL_NUM_MIOS U(78)
#define MAX_PIN_PER_REG U(26)
#define PINCTRL_BANK_ADDR_STEP U(28)
#define PINCTRL_DRVSTRN0_REG_OFFSET U(0)
#define PINCTRL_DRVSTRN1_REG_OFFSET U(4)
#define PINCTRL_SCHCMOS_REG_OFFSET U(8)
#define PINCTRL_PULLCTRL_REG_OFFSET U(12)
#define PINCTRL_PULLSTAT_REG_OFFSET U(16)
#define PINCTRL_SLEWCTRL_REG_OFFSET U(20)
#define PINCTRL_VOLTAGE_STAT_REG_OFFSET U(24)
#define IOU_SLCR_BANK1_CTRL5 U(0XFF180164)
#define PINCTRL_CFG_ADDR_OFFSET(addr, reg, miopin) \
((addr) + 4 * PINCTRL_NUM_MIOS + PINCTRL_BANK_ADDR_STEP * \
((miopin) / MAX_PIN_PER_REG) + (reg))
#define PINCTRL_PIN_OFFSET(_miopin) \
((_miopin) - (MAX_PIN_PER_REG * ((_miopin) / MAX_PIN_PER_REG)))
#define PINCTRL_REGVAL_TO_PIN_CONFIG(_pin, _val) \
(((_val) >> PINCTRL_PIN_OFFSET(_pin)) & 0x1)
static uint8_t pm_pinctrl_mux[NFUNCS_PER_PIN] = {
0x02, 0x04, 0x08, 0x10, 0x18,
0x00, 0x20, 0x40, 0x60, 0x80,
0xA0, 0xC0, 0xE0
};
struct pinctrl_function { struct pinctrl_function {
char name[FUNCTION_NAME_LEN]; char name[FUNCTION_NAME_LEN];
uint16_t (*groups)[]; uint16_t (*groups)[];
...@@ -2604,18 +2571,13 @@ enum pm_ret_status pm_api_pinctrl_get_num_func_groups(unsigned int fid, ...@@ -2604,18 +2571,13 @@ enum pm_ret_status pm_api_pinctrl_get_num_func_groups(unsigned int fid,
* *
* This function is used by master to get name of function specified * This function is used by master to get name of function specified
* by given function ID. * by given function ID.
*
* @return Returns success. In case of error, name data is 0.
*/ */
enum pm_ret_status pm_api_pinctrl_get_function_name(unsigned int fid, void pm_api_pinctrl_get_function_name(unsigned int fid, char *name)
char *name)
{ {
if (fid >= MAX_FUNCTION) if (fid >= MAX_FUNCTION)
memcpy(name, END_OF_FUNCTION, FUNCTION_NAME_LEN); memcpy(name, END_OF_FUNCTION, FUNCTION_NAME_LEN);
else else
memcpy(name, pinctrl_functions[fid].name, FUNCTION_NAME_LEN); memcpy(name, pinctrl_functions[fid].name, FUNCTION_NAME_LEN);
return PM_RET_SUCCESS;
} }
/** /**
...@@ -2713,330 +2675,3 @@ enum pm_ret_status pm_api_pinctrl_get_pin_groups(unsigned int pin, ...@@ -2713,330 +2675,3 @@ enum pm_ret_status pm_api_pinctrl_get_pin_groups(unsigned int pin,
return PM_RET_SUCCESS; return PM_RET_SUCCESS;
} }
/**
* pm_api_pinctrl_get_function() - Read function id set for the given pin
* @pin Pin number
* @nid Node ID of function currently set for given pin
*
* This function provides the function currently set for the given pin.
*
* @return Returns status, either success or error+reason
*/
enum pm_ret_status pm_api_pinctrl_get_function(unsigned int pin,
unsigned int *id)
{
unsigned int i = 0, j = 0;
enum pm_ret_status ret = PM_RET_SUCCESS;
unsigned int ctrlreg, val, gid;
uint16_t *grps;
ctrlreg = IOU_SLCR_BASEADDR + 4U * pin;
ret = pm_mmio_read(ctrlreg, &val);
if (ret != PM_RET_SUCCESS)
return ret;
val &= PINCTRL_FUNCTION_MASK;
for (i = 0; i < NFUNCS_PER_PIN; i++)
if (val == pm_pinctrl_mux[i])
break;
if (i == NFUNCS_PER_PIN)
return PM_RET_ERROR_NOTSUPPORTED;
gid = *(*zynqmp_pin_groups[pin].groups + i);
for (i = 0; i < MAX_FUNCTION; i++) {
grps = *pinctrl_functions[i].groups;
if (grps == NULL)
continue;
if (val != pinctrl_functions[i].regval)
continue;
for (j = 0; grps[j] != (uint16_t)END_OF_GROUPS; j++) {
if (gid == grps[j]) {
*id = i;
goto done;
}
}
}
if (i == MAX_FUNCTION)
ret = PM_RET_ERROR_ARGS;
done:
return ret;
}
/**
* pm_api_pinctrl_set_function() - Set function id set for the given pin
* @pin Pin number
* @nid Node ID of function to set for given pin
*
* This function provides the function currently set for the given pin.
*
* @return Returns status, either success or error+reason
*/
enum pm_ret_status pm_api_pinctrl_set_function(unsigned int pin,
unsigned int fid)
{
int i, j;
unsigned int ctrlreg, val;
uint16_t *pgrps, *fgrps;
ctrlreg = IOU_SLCR_BASEADDR + 4U * pin;
val = pinctrl_functions[fid].regval;
for (i = 0; i < NFUNCS_PER_PIN; i++)
if (val == pm_pinctrl_mux[i])
break;
if (i == NFUNCS_PER_PIN)
return PM_RET_ERROR_NOTSUPPORTED;
pgrps = *zynqmp_pin_groups[pin].groups;
if (!pgrps)
return PM_RET_ERROR_NOTSUPPORTED;
fgrps = *pinctrl_functions[fid].groups;
if (!fgrps)
return PM_RET_ERROR_NOTSUPPORTED;
for (i = 0; fgrps[i] != (uint16_t)END_OF_GROUPS; i++)
for (j = 0; pgrps[j] != (uint16_t)END_OF_GROUPS; j++)
if (fgrps[i] == pgrps[j])
goto match;
return PM_RET_ERROR_NOTSUPPORTED;
match:
return pm_mmio_write(ctrlreg, PINCTRL_FUNCTION_MASK, val);
}
/**
* pm_api_pinctrl_set_config() - Set configuration parameter for given pin
* @pin: Pin for which configuration is to be set
* @param: Configuration parameter to be set
* @value: Value to be set for configuration parameter
*
* This function sets value of requested configuration parameter for given pin.
*
* @return Returns status, either success or error+reason
*/
enum pm_ret_status pm_api_pinctrl_set_config(unsigned int pin,
unsigned int param,
unsigned int value)
{
enum pm_ret_status ret;
unsigned int ctrlreg, mask, val, offset;
if (param >= PINCTRL_CONFIG_MAX)
return PM_RET_ERROR_NOTSUPPORTED;
if (pin >= PINCTRL_NUM_MIOS)
return PM_RET_ERROR_ARGS;
mask = 1 << PINCTRL_PIN_OFFSET(pin);
switch (param) {
case PINCTRL_CONFIG_SLEW_RATE:
if (value != PINCTRL_SLEW_RATE_FAST &&
value != PINCTRL_SLEW_RATE_SLOW)
return PM_RET_ERROR_ARGS;
ctrlreg = PINCTRL_CFG_ADDR_OFFSET(IOU_SLCR_BASEADDR,
PINCTRL_SLEWCTRL_REG_OFFSET,
pin);
val = value << PINCTRL_PIN_OFFSET(pin);
ret = pm_mmio_write(ctrlreg, mask, val);
break;
case PINCTRL_CONFIG_BIAS_STATUS:
if (value != PINCTRL_BIAS_ENABLE &&
value != PINCTRL_BIAS_DISABLE)
return PM_RET_ERROR_ARGS;
ctrlreg = PINCTRL_CFG_ADDR_OFFSET(IOU_SLCR_BASEADDR,
PINCTRL_PULLSTAT_REG_OFFSET,
pin);
offset = PINCTRL_PIN_OFFSET(pin);
if (ctrlreg == IOU_SLCR_BANK1_CTRL5)
offset = (offset < 12U) ?
(offset + 14U) : (offset - 12U);
val = value << offset;
mask = 1 << offset;
ret = pm_mmio_write(ctrlreg, mask, val);
break;
case PINCTRL_CONFIG_PULL_CTRL:
if (value != PINCTRL_BIAS_PULL_DOWN &&
value != PINCTRL_BIAS_PULL_UP)
return PM_RET_ERROR_ARGS;
ctrlreg = PINCTRL_CFG_ADDR_OFFSET(IOU_SLCR_BASEADDR,
PINCTRL_PULLSTAT_REG_OFFSET,
pin);
offset = PINCTRL_PIN_OFFSET(pin);
if (ctrlreg == IOU_SLCR_BANK1_CTRL5)
offset = (offset < 12U) ?
(offset + 14U) : (offset - 12U);
val = PINCTRL_BIAS_ENABLE << offset;
ret = pm_mmio_write(ctrlreg, 1 << offset, val);
if (ret != PM_RET_SUCCESS)
return ret;
ctrlreg = PINCTRL_CFG_ADDR_OFFSET(IOU_SLCR_BASEADDR,
PINCTRL_PULLCTRL_REG_OFFSET,
pin);
val = value << PINCTRL_PIN_OFFSET(pin);
ret = pm_mmio_write(ctrlreg, mask, val);
break;
case PINCTRL_CONFIG_SCHMITT_CMOS:
if (value != PINCTRL_INPUT_TYPE_CMOS &&
value != PINCTRL_INPUT_TYPE_SCHMITT)
return PM_RET_ERROR_ARGS;
ctrlreg = PINCTRL_CFG_ADDR_OFFSET(IOU_SLCR_BASEADDR,
PINCTRL_SCHCMOS_REG_OFFSET,
pin);
val = value << PINCTRL_PIN_OFFSET(pin);
ret = pm_mmio_write(ctrlreg, mask, val);
break;
case PINCTRL_CONFIG_DRIVE_STRENGTH:
if (value > PINCTRL_DRIVE_STRENGTH_12MA)
return PM_RET_ERROR_ARGS;
ctrlreg = PINCTRL_CFG_ADDR_OFFSET(IOU_SLCR_BASEADDR,
PINCTRL_DRVSTRN0_REG_OFFSET,
pin);
val = (value >> 1) << PINCTRL_PIN_OFFSET(pin);
ret = pm_mmio_write(ctrlreg, mask, val);
if (ret)
return ret;
ctrlreg = PINCTRL_CFG_ADDR_OFFSET(IOU_SLCR_BASEADDR,
PINCTRL_DRVSTRN1_REG_OFFSET,
pin);
val = (value & 0x01U) << PINCTRL_PIN_OFFSET(pin);
ret = pm_mmio_write(ctrlreg, mask, val);
break;
default:
ERROR("Invalid parameter %u\n", param);
ret = PM_RET_ERROR_NOTSUPPORTED;
break;
}
return ret;
}
/**
* pm_api_pinctrl_get_config() - Get configuration parameter value for given pin
* @pin: Pin for which configuration is to be read
* @param: Configuration parameter to be read
* @value: buffer to store value of configuration parameter
*
* This function reads value of requested configuration parameter for given pin.
*
* @return Returns status, either success or error+reason
*/
enum pm_ret_status pm_api_pinctrl_get_config(unsigned int pin,
unsigned int param,
unsigned int *value)
{
enum pm_ret_status ret;
unsigned int ctrlreg, val;
if (param >= PINCTRL_CONFIG_MAX)
return PM_RET_ERROR_NOTSUPPORTED;
if (pin >= PINCTRL_NUM_MIOS)
return PM_RET_ERROR_ARGS;
switch (param) {
case PINCTRL_CONFIG_SLEW_RATE:
ctrlreg = PINCTRL_CFG_ADDR_OFFSET(IOU_SLCR_BASEADDR,
PINCTRL_SLEWCTRL_REG_OFFSET,
pin);
ret = pm_mmio_read(ctrlreg, &val);
if (ret != PM_RET_SUCCESS)
return ret;
*value = PINCTRL_REGVAL_TO_PIN_CONFIG(pin, val);
break;
case PINCTRL_CONFIG_BIAS_STATUS:
ctrlreg = PINCTRL_CFG_ADDR_OFFSET(IOU_SLCR_BASEADDR,
PINCTRL_PULLSTAT_REG_OFFSET,
pin);
ret = pm_mmio_read(ctrlreg, &val);
if (ret)
return ret;
if (ctrlreg == IOU_SLCR_BANK1_CTRL5)
val = ((val & 0x3FFF) << 12) | ((val >> 14) & 0xFFF);
*value = PINCTRL_REGVAL_TO_PIN_CONFIG(pin, val);
break;
case PINCTRL_CONFIG_PULL_CTRL:
ctrlreg = PINCTRL_CFG_ADDR_OFFSET(IOU_SLCR_BASEADDR,
PINCTRL_PULLCTRL_REG_OFFSET,
pin);
ret = pm_mmio_read(ctrlreg, &val);
if (ret)
return ret;
*value = PINCTRL_REGVAL_TO_PIN_CONFIG(pin, val);
break;
case PINCTRL_CONFIG_SCHMITT_CMOS:
ctrlreg = PINCTRL_CFG_ADDR_OFFSET(IOU_SLCR_BASEADDR,
PINCTRL_SCHCMOS_REG_OFFSET,
pin);
ret = pm_mmio_read(ctrlreg, &val);
if (ret)
return ret;
*value = PINCTRL_REGVAL_TO_PIN_CONFIG(pin, val);
break;
case PINCTRL_CONFIG_DRIVE_STRENGTH:
ctrlreg = PINCTRL_CFG_ADDR_OFFSET(IOU_SLCR_BASEADDR,
PINCTRL_DRVSTRN0_REG_OFFSET,
pin);
ret = pm_mmio_read(ctrlreg, &val);
if (ret)
return ret;
*value = PINCTRL_REGVAL_TO_PIN_CONFIG(pin, val) << 1;
ctrlreg = PINCTRL_CFG_ADDR_OFFSET(IOU_SLCR_BASEADDR,
PINCTRL_DRVSTRN1_REG_OFFSET,
pin);
ret = pm_mmio_read(ctrlreg, &val);
if (ret)
return ret;
*value |= PINCTRL_REGVAL_TO_PIN_CONFIG(pin, val);
break;
case PINCTRL_CONFIG_VOLTAGE_STATUS:
ctrlreg = PINCTRL_CFG_ADDR_OFFSET(IOU_SLCR_BASEADDR,
PINCTRL_VOLTAGE_STAT_REG_OFFSET,
pin);
ret = pm_mmio_read(ctrlreg, &val);
if (ret)
return ret;
*value = val & PINCTRL_VOLTAGE_STATUS_MASK;
break;
default:
return PM_RET_ERROR_NOTSUPPORTED;
}
return PM_RET_SUCCESS;
}
/* /*
* Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
...@@ -709,18 +709,7 @@ enum { ...@@ -709,18 +709,7 @@ enum {
#define PINCTRL_DRIVE_STRENGTH_8MA 2U #define PINCTRL_DRIVE_STRENGTH_8MA 2U
#define PINCTRL_DRIVE_STRENGTH_12MA 3U #define PINCTRL_DRIVE_STRENGTH_12MA 3U
enum pm_ret_status pm_api_pinctrl_set_function(unsigned int pin, void pm_api_pinctrl_get_function_name(unsigned int fid, char *name);
unsigned int fid);
enum pm_ret_status pm_api_pinctrl_get_function(unsigned int pin,
unsigned int *id);
enum pm_ret_status pm_api_pinctrl_set_config(unsigned int pin,
unsigned int param,
unsigned int value);
enum pm_ret_status pm_api_pinctrl_get_config(unsigned int pin,
unsigned int param,
unsigned int *value);
enum pm_ret_status pm_api_pinctrl_get_function_name(unsigned int fid,
char *name);
enum pm_ret_status pm_api_pinctrl_get_function_groups(unsigned int fid, enum pm_ret_status pm_api_pinctrl_get_function_groups(unsigned int fid,
unsigned int index, unsigned int index,
uint16_t *groups); uint16_t *groups);
......
...@@ -655,7 +655,11 @@ void pm_get_callbackdata(uint32_t *data, size_t count) ...@@ -655,7 +655,11 @@ void pm_get_callbackdata(uint32_t *data, size_t count)
*/ */
enum pm_ret_status pm_pinctrl_request(unsigned int pin) enum pm_ret_status pm_pinctrl_request(unsigned int pin)
{ {
return PM_RET_SUCCESS; uint32_t payload[PAYLOAD_ARG_CNT];
/* Send request to the PMU */
PM_PACK_PAYLOAD2(payload, PM_PINCTRL_REQUEST, pin);
return pm_ipi_send_sync(primary_proc, payload, NULL, 0);
} }
/** /**
...@@ -668,37 +672,44 @@ enum pm_ret_status pm_pinctrl_request(unsigned int pin) ...@@ -668,37 +672,44 @@ enum pm_ret_status pm_pinctrl_request(unsigned int pin)
*/ */
enum pm_ret_status pm_pinctrl_release(unsigned int pin) enum pm_ret_status pm_pinctrl_release(unsigned int pin)
{ {
return PM_RET_SUCCESS; uint32_t payload[PAYLOAD_ARG_CNT];
/* Send request to the PMU */
PM_PACK_PAYLOAD2(payload, PM_PINCTRL_RELEASE, pin);
return pm_ipi_send_sync(primary_proc, payload, NULL, 0);
} }
/** /**
* pm_pinctrl_get_function() - Read function id set for the given pin * pm_pinctrl_get_function() - Read function id set for the given pin
* @pin Pin number * @pin Pin number
* @nid Node ID of function currently set for given pin * @fid ID of function currently set for given pin
* *
* This function provides the function currently set for the given pin. * This function provides the function currently set for the given pin.
* *
* @return Returns status, either success or error+reason * @return Returns status, either success or error+reason
*/ */
enum pm_ret_status pm_pinctrl_get_function(unsigned int pin, enum pm_ret_status pm_pinctrl_get_function(unsigned int pin, unsigned int *fid)
enum pm_node_id *nid)
{ {
return pm_api_pinctrl_get_function(pin, nid); uint32_t payload[PAYLOAD_ARG_CNT];
PM_PACK_PAYLOAD2(payload, PM_PINCTRL_GET_FUNCTION, pin);
return pm_ipi_send_sync(primary_proc, payload, fid, 1);
} }
/** /**
* pm_pinctrl_set_function() - Set function id set for the given pin * pm_pinctrl_set_function() - Set function id set for the given pin
* @pin Pin number * @pin Pin number
* @nid Node ID of function to set for given pin * @fid ID of function to set for given pin
*
* This function provides the function currently set for the given pin.
* *
* @return Returns status, either success or error+reason * @return Returns status, either success or error+reason
*/ */
enum pm_ret_status pm_pinctrl_set_function(unsigned int pin, enum pm_ret_status pm_pinctrl_set_function(unsigned int pin, unsigned int fid)
enum pm_node_id nid)
{ {
return pm_api_pinctrl_set_function(pin, (unsigned int)nid); uint32_t payload[PAYLOAD_ARG_CNT];
/* Send request to the PMU */
PM_PACK_PAYLOAD3(payload, PM_PINCTRL_SET_FUNCTION, pin, fid);
return pm_ipi_send_sync(primary_proc, payload, NULL, 0);
} }
/** /**
...@@ -715,24 +726,30 @@ enum pm_ret_status pm_pinctrl_get_config(unsigned int pin, ...@@ -715,24 +726,30 @@ enum pm_ret_status pm_pinctrl_get_config(unsigned int pin,
unsigned int param, unsigned int param,
unsigned int *value) unsigned int *value)
{ {
return pm_api_pinctrl_get_config(pin, param, value); uint32_t payload[PAYLOAD_ARG_CNT];
PM_PACK_PAYLOAD3(payload, PM_PINCTRL_CONFIG_PARAM_GET, pin, param);
return pm_ipi_send_sync(primary_proc, payload, value, 1);
} }
/** /**
* pm_pinctrl_set_config() - Read value of requested config param for given pin * pm_pinctrl_set_config() - Set value of requested config param for given pin
* @pin Pin number * @pin Pin number
* @param Parameter to set * @param Parameter to set
* @value Parameter value to set * @value Parameter value to set
* *
* This function provides the configuration parameter value for the given pin.
*
* @return Returns status, either success or error+reason * @return Returns status, either success or error+reason
*/ */
enum pm_ret_status pm_pinctrl_set_config(unsigned int pin, enum pm_ret_status pm_pinctrl_set_config(unsigned int pin,
unsigned int param, unsigned int param,
unsigned int value) unsigned int value)
{ {
return pm_api_pinctrl_set_config(pin, param, value); uint32_t payload[PAYLOAD_ARG_CNT];
/* Send request to the PMU */
PM_PACK_PAYLOAD4(payload, PM_PINCTRL_CONFIG_PARAM_SET, pin, param,
value);
return pm_ipi_send_sync(primary_proc, payload, NULL, 0);
} }
/** /**
...@@ -793,12 +810,10 @@ static enum pm_ret_status pm_clock_get_num_clocks(uint32_t *nclocks) ...@@ -793,12 +810,10 @@ static enum pm_ret_status pm_clock_get_num_clocks(uint32_t *nclocks)
* *
* This function is used by master to get nmae of clock specified * This function is used by master to get nmae of clock specified
* by given clock ID. * by given clock ID.
*
* @return Returns status, either success or error+reason
*/ */
static enum pm_ret_status pm_clock_get_name(unsigned int clock_id, char *name) static void pm_clock_get_name(unsigned int clock_id, char *name)
{ {
return pm_api_clock_get_name(clock_id, name); pm_api_clock_get_name(clock_id, name);
} }
/** /**
...@@ -1235,13 +1250,10 @@ static enum pm_ret_status pm_pinctrl_get_num_function_groups(unsigned int fid, ...@@ -1235,13 +1250,10 @@ static enum pm_ret_status pm_pinctrl_get_num_function_groups(unsigned int fid,
* *
* This function is used by master to get name of function specified * This function is used by master to get name of function specified
* by given function Id * by given function Id
*
* Return: Returns status, either success or error+reason.
*/ */
static enum pm_ret_status pm_pinctrl_get_function_name(unsigned int fid, static void pm_pinctrl_get_function_name(unsigned int fid, char *name)
char *name)
{ {
return pm_api_pinctrl_get_function_name(fid, name); pm_api_pinctrl_get_function_name(fid, name);
} }
/** /**
...@@ -1301,78 +1313,58 @@ static enum pm_ret_status pm_pinctrl_get_pin_groups(unsigned int pin_id, ...@@ -1301,78 +1313,58 @@ static enum pm_ret_status pm_pinctrl_get_pin_groups(unsigned int pin_id,
* @data Returned output data * @data Returned output data
* *
* This function returns requested data. * This function returns requested data.
*
* @return Returns status, either success or error+reason
*/ */
enum pm_ret_status pm_query_data(enum pm_query_id qid, void pm_query_data(enum pm_query_id qid, unsigned int arg1, unsigned int arg2,
unsigned int arg1, unsigned int arg3, unsigned int *data)
unsigned int arg2,
unsigned int arg3,
unsigned int *data)
{ {
enum pm_ret_status ret;
switch (qid) { switch (qid) {
case PM_QID_CLOCK_GET_NAME: case PM_QID_CLOCK_GET_NAME:
ret = pm_clock_get_name(arg1, (char *)data); pm_clock_get_name(arg1, (char *)data);
break; break;
case PM_QID_CLOCK_GET_TOPOLOGY: case PM_QID_CLOCK_GET_TOPOLOGY:
ret = pm_clock_get_topology(arg1, arg2, &data[1]); data[0] = pm_clock_get_topology(arg1, arg2, &data[1]);
data[0] = (unsigned int)ret;
break; break;
case PM_QID_CLOCK_GET_FIXEDFACTOR_PARAMS: case PM_QID_CLOCK_GET_FIXEDFACTOR_PARAMS:
ret = pm_clock_get_fixedfactor_params(arg1, &data[1], &data[2]); data[0] = pm_clock_get_fixedfactor_params(arg1, &data[1],
data[0] = (unsigned int)ret; &data[2]);
break; break;
case PM_QID_CLOCK_GET_PARENTS: case PM_QID_CLOCK_GET_PARENTS:
ret = pm_clock_get_parents(arg1, arg2, &data[1]); data[0] = pm_clock_get_parents(arg1, arg2, &data[1]);
data[0] = (unsigned int)ret;
break; break;
case PM_QID_CLOCK_GET_ATTRIBUTES: case PM_QID_CLOCK_GET_ATTRIBUTES:
ret = pm_clock_get_attributes(arg1, &data[1]); data[0] = pm_clock_get_attributes(arg1, &data[1]);
data[0] = (unsigned int)ret;
break; break;
case PM_QID_PINCTRL_GET_NUM_PINS: case PM_QID_PINCTRL_GET_NUM_PINS:
ret = pm_pinctrl_get_num_pins(&data[1]); data[0] = pm_pinctrl_get_num_pins(&data[1]);
data[0] = (unsigned int)ret;
break; break;
case PM_QID_PINCTRL_GET_NUM_FUNCTIONS: case PM_QID_PINCTRL_GET_NUM_FUNCTIONS:
ret = pm_pinctrl_get_num_functions(&data[1]); data[0] = pm_pinctrl_get_num_functions(&data[1]);
data[0] = (unsigned int)ret;
break; break;
case PM_QID_PINCTRL_GET_NUM_FUNCTION_GROUPS: case PM_QID_PINCTRL_GET_NUM_FUNCTION_GROUPS:
ret = pm_pinctrl_get_num_function_groups(arg1, &data[1]); data[0] = pm_pinctrl_get_num_function_groups(arg1, &data[1]);
data[0] = (unsigned int)ret;
break; break;
case PM_QID_PINCTRL_GET_FUNCTION_NAME: case PM_QID_PINCTRL_GET_FUNCTION_NAME:
ret = pm_pinctrl_get_function_name(arg1, (char *)data); pm_pinctrl_get_function_name(arg1, (char *)data);
break; break;
case PM_QID_PINCTRL_GET_FUNCTION_GROUPS: case PM_QID_PINCTRL_GET_FUNCTION_GROUPS:
ret = pm_pinctrl_get_function_groups(arg1, arg2, data[0] = pm_pinctrl_get_function_groups(arg1, arg2,
(uint16_t *)&data[1]); (uint16_t *)&data[1]);
data[0] = (unsigned int)ret;
break; break;
case PM_QID_PINCTRL_GET_PIN_GROUPS: case PM_QID_PINCTRL_GET_PIN_GROUPS:
ret = pm_pinctrl_get_pin_groups(arg1, arg2, data[0] = pm_pinctrl_get_pin_groups(arg1, arg2,
(uint16_t *)&data[1]); (uint16_t *)&data[1]);
data[0] = (unsigned int)ret;
break; break;
case PM_QID_CLOCK_GET_NUM_CLOCKS: case PM_QID_CLOCK_GET_NUM_CLOCKS:
ret = pm_clock_get_num_clocks(&data[1]); data[0] = pm_clock_get_num_clocks(&data[1]);
data[0] = (unsigned int)ret;
break; break;
case PM_QID_CLOCK_GET_MAX_DIVISOR: case PM_QID_CLOCK_GET_MAX_DIVISOR:
ret = pm_clock_get_max_divisor(arg1, arg2, &data[1]); data[0] = pm_clock_get_max_divisor(arg1, arg2, &data[1]);
data[0] = (unsigned int)ret;
break; break;
default: default:
ret = PM_RET_ERROR_ARGS; data[0] = PM_RET_ERROR_ARGS;
WARN("Unimplemented query service call: 0x%x\n", qid); WARN("Unimplemented query service call: 0x%x\n", qid);
break;
} }
return ret;
} }
enum pm_ret_status pm_sha_hash(uint32_t address_high, enum pm_ret_status pm_sha_hash(uint32_t address_high,
......
...@@ -151,11 +151,8 @@ enum pm_ret_status pm_clock_setparent(unsigned int clock_id, ...@@ -151,11 +151,8 @@ enum pm_ret_status pm_clock_setparent(unsigned int clock_id,
unsigned int parent_id); unsigned int parent_id);
enum pm_ret_status pm_clock_getparent(unsigned int clock_id, enum pm_ret_status pm_clock_getparent(unsigned int clock_id,
unsigned int *parent_id); unsigned int *parent_id);
enum pm_ret_status pm_query_data(enum pm_query_id qid, void pm_query_data(enum pm_query_id qid, unsigned int arg1, unsigned int arg2,
unsigned int arg1, unsigned int arg3, unsigned int *data);
unsigned int arg2,
unsigned int arg3,
unsigned int *data);
enum pm_ret_status pm_sha_hash(uint32_t address_high, enum pm_ret_status pm_sha_hash(uint32_t address_high,
uint32_t address_low, uint32_t address_low,
uint32_t size, uint32_t size,
......
...@@ -474,8 +474,8 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3, ...@@ -474,8 +474,8 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3,
{ {
uint32_t data[4] = { 0 }; uint32_t data[4] = { 0 };
ret = pm_query_data(pm_arg[0], pm_arg[1], pm_arg[2], pm_query_data(pm_arg[0], pm_arg[1], pm_arg[2],
pm_arg[3], data); pm_arg[3], data);
SMC_RET2(handle, (uint64_t)data[0] | ((uint64_t)data[1] << 32), SMC_RET2(handle, (uint64_t)data[0] | ((uint64_t)data[1] << 32),
(uint64_t)data[2] | ((uint64_t)data[3] << 32)); (uint64_t)data[2] | ((uint64_t)data[3] << 32));
} }
......
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