Commit dccad477 authored by Manish Pandey's avatar Manish Pandey Committed by TrustedFirmware Code Review
Browse files

Merge changes from topic "renaming_daniel" into integration

* changes:
  plat/arm: rename rddanielxlr to rdv1mc
  plat/arm: rename rddaniel to rdv1
parents a33668bd 90aecf1e
......@@ -7,7 +7,7 @@
/dts-v1/;
/ {
/* compatible string */
compatible = "arm,rd-daniel";
compatible = "arm,rd-v1";
/*
* Place holder for system-id node with default values. The
......
......@@ -3,45 +3,45 @@
# SPDX-License-Identifier: BSD-3-Clause
#
# RD-Daniel platform uses GIC-Clayton which is based on GICv4.1
# RD-V1 platform uses GIC-Clayton which is based on GICv4.1
GIC_ENABLE_V4_EXTN := 1
include plat/arm/css/sgi/sgi-common.mk
RDDANIEL_BASE = plat/arm/board/rddaniel
RDV1_BASE = plat/arm/board/rdv1
PLAT_INCLUDES += -I${RDDANIEL_BASE}/include/
PLAT_INCLUDES += -I${RDV1_BASE}/include/
SGI_CPU_SOURCES := lib/cpus/aarch64/neoverse_v1.S
PLAT_BL_COMMON_SOURCES += ${CSS_ENT_BASE}/sgi_plat.c
BL1_SOURCES += ${SGI_CPU_SOURCES} \
${RDDANIEL_BASE}/rddaniel_err.c
${RDV1_BASE}/rdv1_err.c
BL2_SOURCES += ${RDDANIEL_BASE}/rddaniel_plat.c \
${RDDANIEL_BASE}/rddaniel_security.c \
${RDDANIEL_BASE}/rddaniel_err.c \
BL2_SOURCES += ${RDV1_BASE}/rdv1_plat.c \
${RDV1_BASE}/rdv1_security.c \
${RDV1_BASE}/rdv1_err.c \
lib/utils/mem_region.c \
drivers/arm/tzc/tzc400.c \
plat/arm/common/arm_tzc400.c \
plat/arm/common/arm_nor_psci_mem_protect.c
BL31_SOURCES += ${SGI_CPU_SOURCES} \
${RDDANIEL_BASE}/rddaniel_plat.c \
${RDDANIEL_BASE}/rddaniel_topology.c \
${RDV1_BASE}/rdv1_plat.c \
${RDV1_BASE}/rdv1_topology.c \
drivers/cfi/v2m/v2m_flash.c \
lib/utils/mem_region.c \
plat/arm/common/arm_nor_psci_mem_protect.c
ifeq (${TRUSTED_BOARD_BOOT}, 1)
BL1_SOURCES += ${RDDANIEL_BASE}/rddaniel_trusted_boot.c
BL2_SOURCES += ${RDDANIEL_BASE}/rddaniel_trusted_boot.c
BL1_SOURCES += ${RDV1_BASE}/rdv1_trusted_boot.c
BL2_SOURCES += ${RDV1_BASE}/rdv1_trusted_boot.c
endif
# Add the FDT_SOURCES and options for Dynamic Config
FDT_SOURCES += ${RDDANIEL_BASE}/fdts/${PLAT}_fw_config.dts \
${RDDANIEL_BASE}/fdts/${PLAT}_tb_fw_config.dts
FDT_SOURCES += ${RDV1_BASE}/fdts/${PLAT}_fw_config.dts \
${RDV1_BASE}/fdts/${PLAT}_tb_fw_config.dts
FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb
TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb
......@@ -50,7 +50,7 @@ $(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG}))
# Add the TB_FW_CONFIG to FIP and specify the same to certtool
$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG}))
FDT_SOURCES += ${RDDANIEL_BASE}/fdts/${PLAT}_nt_fw_config.dts
FDT_SOURCES += ${RDV1_BASE}/fdts/${PLAT}_nt_fw_config.dts
NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb
# Add the NT_FW_CONFIG to FIP and specify the same to certtool
......
......@@ -7,7 +7,7 @@
#include <plat/arm/common/plat_arm.h>
/*
* rddaniel error handler
* rdv1 error handler
*/
void __dead2 plat_arm_error_handler(int err)
{
......
......@@ -10,7 +10,7 @@
/******************************************************************************
* The power domain tree descriptor.
******************************************************************************/
const unsigned char rd_daniel_pd_tree_desc[] = {
const unsigned char rd_v1_pd_tree_desc[] = {
PLAT_ARM_CLUSTER_COUNT,
CSS_SGI_MAX_CPUS_PER_CLUSTER,
CSS_SGI_MAX_CPUS_PER_CLUSTER,
......@@ -35,7 +35,7 @@ const unsigned char rd_daniel_pd_tree_desc[] = {
******************************************************************************/
const unsigned char *plat_get_power_domain_tree_desc(void)
{
return rd_daniel_pd_tree_desc;
return rd_v1_pd_tree_desc;
}
/*******************************************************************************
......
......@@ -7,7 +7,7 @@
/dts-v1/;
/ {
/* compatible string */
compatible = "arm,rd-daniel-xlr";
compatible = "arm,rd-v1-mc";
/*
* Place holder for system-id node with default values. The
......
......@@ -9,42 +9,42 @@ GICV3_IMPL_GIC600_MULTICHIP := 1
include plat/arm/css/sgi/sgi-common.mk
RDDANIELXLR_BASE = plat/arm/board/rddanielxlr
RDV1MC_BASE = plat/arm/board/rdv1mc
PLAT_INCLUDES += -I${RDDANIELXLR_BASE}/include/
PLAT_INCLUDES += -I${RDV1MC_BASE}/include/
SGI_CPU_SOURCES := lib/cpus/aarch64/neoverse_v1.S
PLAT_BL_COMMON_SOURCES += ${CSS_ENT_BASE}/sgi_plat.c
BL1_SOURCES += ${SGI_CPU_SOURCES} \
${RDDANIELXLR_BASE}/rddanielxlr_err.c
${RDV1MC_BASE}/rdv1mc_err.c
BL2_SOURCES += ${RDDANIELXLR_BASE}/rddanielxlr_plat.c \
${RDDANIELXLR_BASE}/rddanielxlr_security.c \
${RDDANIELXLR_BASE}/rddanielxlr_err.c \
BL2_SOURCES += ${RDV1MC_BASE}/rdv1mc_plat.c \
${RDV1MC_BASE}/rdv1mc_security.c \
${RDV1MC_BASE}/rdv1mc_err.c \
lib/utils/mem_region.c \
plat/arm/common/arm_nor_psci_mem_protect.c
BL31_SOURCES += ${SGI_CPU_SOURCES} \
${RDDANIELXLR_BASE}/rddanielxlr_plat.c \
${RDDANIELXLR_BASE}/rddanielxlr_topology.c \
${RDV1MC_BASE}/rdv1mc_plat.c \
${RDV1MC_BASE}/rdv1mc_topology.c \
drivers/cfi/v2m/v2m_flash.c \
drivers/arm/gic/v3/gic600_multichip.c \
lib/utils/mem_region.c \
plat/arm/common/arm_nor_psci_mem_protect.c
ifeq (${TRUSTED_BOARD_BOOT}, 1)
BL1_SOURCES += ${RDDANIELXLR_BASE}/rddanielxlr_trusted_boot.c
BL2_SOURCES += ${RDDANIELXLR_BASE}/rddanielxlr_trusted_boot.c
BL1_SOURCES += ${RDV1MC_BASE}/rdv1mc_trusted_boot.c
BL2_SOURCES += ${RDV1MC_BASE}/rdv1mc_trusted_boot.c
endif
# Enable dynamic addition of MMAP regions in BL31
BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC
# Add the FDT_SOURCES and options for Dynamic Config
FDT_SOURCES += ${RDDANIELXLR_BASE}/fdts/${PLAT}_fw_config.dts \
${RDDANIELXLR_BASE}/fdts/${PLAT}_tb_fw_config.dts
FDT_SOURCES += ${RDV1MC_BASE}/fdts/${PLAT}_fw_config.dts \
${RDV1MC_BASE}/fdts/${PLAT}_tb_fw_config.dts
FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb
TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb
......@@ -55,11 +55,11 @@ $(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG}))
$(eval $(call CREATE_SEQ,SEQ,4))
ifneq ($(CSS_SGI_CHIP_COUNT),$(filter $(CSS_SGI_CHIP_COUNT),$(SEQ)))
$(error "Chip count for RD-Daniel Config-XLR should be either $(SEQ) \
$(error "Chip count for RD-V1-MC should be either $(SEQ) \
currently it is set to ${CSS_SGI_CHIP_COUNT}.")
endif
FDT_SOURCES += ${RDDANIELXLR_BASE}/fdts/${PLAT}_nt_fw_config.dts
FDT_SOURCES += ${RDV1MC_BASE}/fdts/${PLAT}_nt_fw_config.dts
NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb
# Add the NT_FW_CONFIG to FIP and specify the same to certtool
......
......@@ -7,7 +7,7 @@
#include <plat/arm/common/plat_arm.h>
/*
* rddanielxlr error handler
* rdv1mc error handler
*/
void __dead2 plat_arm_error_handler(int err)
{
......
......@@ -12,7 +12,7 @@
#include <sgi_plat.h>
#if defined(IMAGE_BL31)
static const mmap_region_t rddanielxlr_dynamic_mmap[] = {
static const mmap_region_t rdv1mc_dynamic_mmap[] = {
ARM_MAP_SHARED_RAM_REMOTE_CHIP(1),
CSS_SGI_MAP_DEVICE_REMOTE_CHIP(1),
SOC_CSS_MAP_DEVICE_REMOTE_CHIP(1),
......@@ -28,7 +28,7 @@ static const mmap_region_t rddanielxlr_dynamic_mmap[] = {
#endif
};
static struct gic600_multichip_data rddanielxlr_multichip_data __init = {
static struct gic600_multichip_data rdv1mc_multichip_data __init = {
.rt_owner_base = PLAT_ARM_GICD_BASE,
.rt_owner = 0,
.chip_count = CSS_SGI_CHIP_COUNT,
......@@ -54,7 +54,7 @@ static struct gic600_multichip_data rddanielxlr_multichip_data __init = {
}
};
static uintptr_t rddanielxlr_multichip_gicr_frames[] = {
static uintptr_t rdv1mc_multichip_gicr_frames[] = {
/* Chip 0's GICR Base */
PLAT_ARM_GICR_BASE,
/* Chip 1's GICR BASE */
......@@ -106,14 +106,14 @@ void bl31_platform_setup(void)
panic();
} else if ((plat_arm_sgi_get_multi_chip_mode() == 1) &&
(CSS_SGI_CHIP_COUNT > 1)) {
INFO("Enabling support for multi-chip in RD-Daniel Cfg-XLR\n");
INFO("Enabling support for multi-chip in RD-V1-MC\n");
for (i = 0; i < ARRAY_SIZE(rddanielxlr_dynamic_mmap); i++) {
for (i = 0; i < ARRAY_SIZE(rdv1mc_dynamic_mmap); i++) {
ret = mmap_add_dynamic_region(
rddanielxlr_dynamic_mmap[i].base_pa,
rddanielxlr_dynamic_mmap[i].base_va,
rddanielxlr_dynamic_mmap[i].size,
rddanielxlr_dynamic_mmap[i].attr);
rdv1mc_dynamic_mmap[i].base_pa,
rdv1mc_dynamic_mmap[i].base_va,
rdv1mc_dynamic_mmap[i].size,
rdv1mc_dynamic_mmap[i].attr);
if (ret != 0) {
ERROR("Failed to add dynamic mmap entry "
"(ret=%d)\n", ret);
......@@ -122,8 +122,8 @@ void bl31_platform_setup(void)
}
plat_arm_override_gicr_frames(
rddanielxlr_multichip_gicr_frames);
gic600_multichip_init(&rddanielxlr_multichip_data);
rdv1mc_multichip_gicr_frames);
gic600_multichip_init(&rdv1mc_multichip_data);
}
sgi_bl31_common_platform_setup();
......
......@@ -12,7 +12,7 @@
/******************************************************************************
* The power domain tree descriptor.
******************************************************************************/
const unsigned char rd_daniel_xlr_pd_tree_desc_multi_chip[] = {
const unsigned char rd_v1_mc_pd_tree_desc_multi_chip[] = {
((PLAT_ARM_CLUSTER_COUNT) * (CSS_SGI_CHIP_COUNT)),
CSS_SGI_MAX_CPUS_PER_CLUSTER,
CSS_SGI_MAX_CPUS_PER_CLUSTER,
......@@ -44,7 +44,7 @@ const unsigned char rd_daniel_xlr_pd_tree_desc_multi_chip[] = {
const unsigned char *plat_get_power_domain_tree_desc(void)
{
if (plat_arm_sgi_get_multi_chip_mode() == 1)
return rd_daniel_xlr_pd_tree_desc_multi_chip;
return rd_v1_mc_pd_tree_desc_multi_chip;
panic();
}
......
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