Commit dd53cfe1 authored by Masahiro Yamada's avatar Masahiro Yamada
Browse files

uniphier: prepare uniphier_soc_info() for next SoC



The revision register address will be changed in the next SoC.

The LSI revision is needed in order to know where the revision
register is located, but you need to read out the revision
register for that. This is impossible.

We need to know the revision register address by other means.
Use BL_CODE_BASE, where the base address of the TF image that is
currently running. If it is bigger than 0x80000000 (i.e. the DRAM
base is 0x80000000), we assume it is a legacy SoC.

Change-Id: I9d7f4325fe2085a8a1ab5310025e5948da611256
Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
parent 896d684d
...@@ -4,18 +4,25 @@ ...@@ -4,18 +4,25 @@
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
#include <common/bl_common.h>
#include <lib/mmio.h> #include <lib/mmio.h>
#include "uniphier.h" #include "uniphier.h"
#define UNIPHIER_REVISION 0x5f800000 #define UNIPHIER_REVISION 0x5f800000UL
#define UNIPHIER_REVISION_NEW 0x1f800000UL
static unsigned int uniphier_get_revision_field(unsigned int mask, static unsigned int uniphier_get_revision_field(unsigned int mask,
unsigned int shift) unsigned int shift)
{ {
uint32_t revision = mmio_read_32(UNIPHIER_REVISION); uintptr_t reg;
return (revision >> shift) & mask; if (BL_CODE_BASE >= 0x80000000UL)
reg = UNIPHIER_REVISION;
else
reg = UNIPHIER_REVISION_NEW;
return (mmio_read_32(reg) >> shift) & mask;
} }
unsigned int uniphier_get_soc_type(void) unsigned int uniphier_get_soc_type(void)
......
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