Commit e1abd560 authored by Yann Gautier's avatar Yann Gautier
Browse files

arch: add some defines for generic timer registers



Those defines are used in STM32MP1 clock driver.
It is better to put them altogether with already defined registers.

Change-Id: I6f8ad8c2477b947af6f76283a4ef5c40212d0027
Signed-off-by: default avatarYann Gautier <yann.gautier@st.com>
parent e1368771
...@@ -1516,9 +1516,6 @@ static void stm32mp1_set_rtcsrc(unsigned int clksrc, bool lse_css) ...@@ -1516,9 +1516,6 @@ static void stm32mp1_set_rtcsrc(unsigned int clksrc, bool lse_css)
} }
} }
#define CNTCVL_OFF 0x008
#define CNTCVU_OFF 0x00C
static void stm32mp1_stgen_config(void) static void stm32mp1_stgen_config(void)
{ {
uintptr_t stgen; uintptr_t stgen;
......
...@@ -81,6 +81,10 @@ ...@@ -81,6 +81,10 @@
* Generic timer memory mapped registers & offsets * Generic timer memory mapped registers & offsets
******************************************************************************/ ******************************************************************************/
#define CNTCR_OFF U(0x000) #define CNTCR_OFF U(0x000)
/* Counter Count Value Lower register */
#define CNTCVL_OFF U(0x008)
/* Counter Count Value Upper register */
#define CNTCVU_OFF U(0x00C)
#define CNTFID_OFF U(0x020) #define CNTFID_OFF U(0x020)
#define CNTCR_EN (U(1) << 0) #define CNTCR_EN (U(1) << 0)
......
...@@ -99,6 +99,7 @@ ...@@ -99,6 +99,7 @@
* Generic timer memory mapped registers & offsets * Generic timer memory mapped registers & offsets
******************************************************************************/ ******************************************************************************/
#define CNTCR_OFF U(0x000) #define CNTCR_OFF U(0x000)
#define CNTCV_OFF U(0x008)
#define CNTFID_OFF U(0x020) #define CNTFID_OFF U(0x020)
#define CNTCR_EN (U(1) << 0) #define CNTCR_EN (U(1) << 0)
......
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