Commit e1c49333 authored by Manish V Badarkhe's avatar Manish V Badarkhe
Browse files

lib/cpus: Report AT speculative erratum workaround



Reported the status (applies, missing) of AT speculative workaround
which is applicable for below CPUs.

 +---------+--------------+
 | Errata  |      CPU     |
 +=========+==============+
 | 1165522 |  Cortex-A76  |
 +---------+--------------+
 | 1319367 |  Cortex-A72  |
 +---------+--------------+
 | 1319537 |  Cortex-A57  |
 +---------+--------------+
 | 1530923 |  Cortex-A55  |
 +---------+--------------+
 | 1530924 |  Cortex-A53  |
 +---------+--------------+

Also, changes are done to enable common macro 'ERRATA_SPECULATIVE_AT'
if AT speculative errata workaround is enabled for any of the above
CPUs using 'ERRATA_*' CPU specific build macro.
Signed-off-by: default avatarManish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: I3e6a5316a2564071f3920c3ce9ae9a29adbe435b
parent 86ba5853
/* /*
* Copyright (c) 2014-2019, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2014-2020, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
...@@ -239,6 +239,20 @@ exit_check_errata_843419: ...@@ -239,6 +239,20 @@ exit_check_errata_843419:
ret ret
endfunc check_errata_843419 endfunc check_errata_843419
/* --------------------------------------------------
* Errata workaround for Cortex A53 Errata #1530924.
* This applies to all revisions of Cortex A53.
* --------------------------------------------------
*/
func check_errata_1530924
#if ERRATA_A53_1530924
mov x0, #ERRATA_APPLIES
#else
mov x0, #ERRATA_MISSING
#endif
ret
endfunc check_errata_1530924
/* ------------------------------------------------- /* -------------------------------------------------
* The CPU Ops reset function for Cortex-A53. * The CPU Ops reset function for Cortex-A53.
* Shall clobber: x0-x19 * Shall clobber: x0-x19
...@@ -359,6 +373,7 @@ func cortex_a53_errata_report ...@@ -359,6 +373,7 @@ func cortex_a53_errata_report
report_errata ERRATA_A53_836870, cortex_a53, disable_non_temporal_hint report_errata ERRATA_A53_836870, cortex_a53, disable_non_temporal_hint
report_errata ERRATA_A53_843419, cortex_a53, 843419 report_errata ERRATA_A53_843419, cortex_a53, 843419
report_errata ERRATA_A53_855873, cortex_a53, 855873 report_errata ERRATA_A53_855873, cortex_a53, 855873
report_errata ERRATA_A53_1530924, cortex_a53, 1530924
ldp x8, x30, [sp], #16 ldp x8, x30, [sp], #16
ret ret
......
/* /*
* Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
...@@ -222,6 +222,20 @@ func check_errata_1221012 ...@@ -222,6 +222,20 @@ func check_errata_1221012
b cpu_rev_var_ls b cpu_rev_var_ls
endfunc check_errata_1221012 endfunc check_errata_1221012
/* --------------------------------------------------
* Errata workaround for Cortex A55 Errata #1530923.
* This applies to all revisions of Cortex A55.
* --------------------------------------------------
*/
func check_errata_1530923
#if ERRATA_A55_1530923
mov x0, #ERRATA_APPLIES
#else
mov x0, #ERRATA_MISSING
#endif
ret
endfunc check_errata_1530923
func cortex_a55_reset_func func cortex_a55_reset_func
mov x19, x30 mov x19, x30
...@@ -306,6 +320,7 @@ func cortex_a55_errata_report ...@@ -306,6 +320,7 @@ func cortex_a55_errata_report
report_errata ERRATA_A55_846532, cortex_a55, 846532 report_errata ERRATA_A55_846532, cortex_a55, 846532
report_errata ERRATA_A55_903758, cortex_a55, 903758 report_errata ERRATA_A55_903758, cortex_a55, 903758
report_errata ERRATA_A55_1221012, cortex_a55, 1221012 report_errata ERRATA_A55_1221012, cortex_a55, 1221012
report_errata ERRATA_A55_1530923, cortex_a55, 1530923
ldp x8, x30, [sp], #16 ldp x8, x30, [sp], #16
ret ret
......
/* /*
* Copyright (c) 2014-2019, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2014-2020, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2020, NVIDIA Corporation. All rights reserved. * Copyright (c) 2020, NVIDIA Corporation. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
...@@ -396,6 +396,20 @@ func check_errata_cve_2018_3639 ...@@ -396,6 +396,20 @@ func check_errata_cve_2018_3639
ret ret
endfunc check_errata_cve_2018_3639 endfunc check_errata_cve_2018_3639
/* --------------------------------------------------
* Errata workaround for Cortex A57 Errata #1319537.
* This applies to all revisions of Cortex A57.
* --------------------------------------------------
*/
func check_errata_1319537
#if ERRATA_A57_1319537
mov x0, #ERRATA_APPLIES
#else
mov x0, #ERRATA_MISSING
#endif
ret
endfunc check_errata_1319537
/* ------------------------------------------------- /* -------------------------------------------------
* The CPU Ops reset function for Cortex-A57. * The CPU Ops reset function for Cortex-A57.
* Shall clobber: x0-x19 * Shall clobber: x0-x19
...@@ -613,6 +627,7 @@ func cortex_a57_errata_report ...@@ -613,6 +627,7 @@ func cortex_a57_errata_report
report_errata ERRATA_A57_829520, cortex_a57, 829520 report_errata ERRATA_A57_829520, cortex_a57, 829520
report_errata ERRATA_A57_833471, cortex_a57, 833471 report_errata ERRATA_A57_833471, cortex_a57, 833471
report_errata ERRATA_A57_859972, cortex_a57, 859972 report_errata ERRATA_A57_859972, cortex_a57, 859972
report_errata ERRATA_A57_1319537, cortex_a57, 1319537
report_errata WORKAROUND_CVE_2017_5715, cortex_a57, cve_2017_5715 report_errata WORKAROUND_CVE_2017_5715, cortex_a57, cve_2017_5715
report_errata WORKAROUND_CVE_2018_3639, cortex_a57, cve_2018_3639 report_errata WORKAROUND_CVE_2018_3639, cortex_a57, cve_2018_3639
......
/* /*
* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
...@@ -119,6 +119,20 @@ func check_errata_cve_2018_3639 ...@@ -119,6 +119,20 @@ func check_errata_cve_2018_3639
ret ret
endfunc check_errata_cve_2018_3639 endfunc check_errata_cve_2018_3639
/* --------------------------------------------------
* Errata workaround for Cortex A72 Errata #1319367.
* This applies to all revisions of Cortex A72.
* --------------------------------------------------
*/
func check_errata_1319367
#if ERRATA_A72_1319367
mov x0, #ERRATA_APPLIES
#else
mov x0, #ERRATA_MISSING
#endif
ret
endfunc check_errata_1319367
/* ------------------------------------------------- /* -------------------------------------------------
* The CPU Ops reset function for Cortex-A72. * The CPU Ops reset function for Cortex-A72.
* ------------------------------------------------- * -------------------------------------------------
...@@ -282,6 +296,7 @@ func cortex_a72_errata_report ...@@ -282,6 +296,7 @@ func cortex_a72_errata_report
* checking functions of each errata. * checking functions of each errata.
*/ */
report_errata ERRATA_A72_859971, cortex_a72, 859971 report_errata ERRATA_A72_859971, cortex_a72, 859971
report_errata ERRATA_A72_1319367, cortex_a72, 1319367
report_errata WORKAROUND_CVE_2017_5715, cortex_a72, cve_2017_5715 report_errata WORKAROUND_CVE_2017_5715, cortex_a72, cve_2017_5715
report_errata WORKAROUND_CVE_2018_3639, cortex_a72, cve_2018_3639 report_errata WORKAROUND_CVE_2018_3639, cortex_a72, cve_2018_3639
......
...@@ -465,6 +465,23 @@ func cortex_a76_disable_wa_cve_2018_3639 ...@@ -465,6 +465,23 @@ func cortex_a76_disable_wa_cve_2018_3639
ret ret
endfunc cortex_a76_disable_wa_cve_2018_3639 endfunc cortex_a76_disable_wa_cve_2018_3639
/* --------------------------------------------------------------
* Errata Workaround for Cortex A76 Errata #1165522.
* This applies only to revisions <= r3p0 of Cortex A76.
* Due to the nature of the errata it is applied unconditionally
* when built in, report it as applicable in this case
* --------------------------------------------------------------
*/
func check_errata_1165522
#if ERRATA_A76_1165522
mov x0, #ERRATA_APPLIES
ret
#else
mov x1, #0x30
b cpu_rev_var_ls
#endif
endfunc check_errata_1165522
/* ------------------------------------------------- /* -------------------------------------------------
* The CPU Ops reset function for Cortex-A76. * The CPU Ops reset function for Cortex-A76.
* Shall clobber: x0-x19 * Shall clobber: x0-x19
...@@ -597,6 +614,7 @@ func cortex_a76_errata_report ...@@ -597,6 +614,7 @@ func cortex_a76_errata_report
report_errata ERRATA_A76_1286807, cortex_a76, 1286807 report_errata ERRATA_A76_1286807, cortex_a76, 1286807
report_errata ERRATA_A76_1791580, cortex_a76, 1791580 report_errata ERRATA_A76_1791580, cortex_a76, 1791580
report_errata ERRATA_A76_1800710, cortex_a76, 1800710 report_errata ERRATA_A76_1800710, cortex_a76, 1800710
report_errata ERRATA_A76_1165522, cortex_a76, 1165522
report_errata WORKAROUND_CVE_2018_3639, cortex_a76, cve_2018_3639 report_errata WORKAROUND_CVE_2018_3639, cortex_a76, cve_2018_3639
report_errata ERRATA_DSU_798953, cortex_a76, dsu_798953 report_errata ERRATA_DSU_798953, cortex_a76, dsu_798953
report_errata ERRATA_DSU_936184, cortex_a76, dsu_936184 report_errata ERRATA_DSU_936184, cortex_a76, dsu_936184
......
...@@ -130,6 +130,10 @@ ERRATA_A53_843419 ?=0 ...@@ -130,6 +130,10 @@ ERRATA_A53_843419 ?=0
# of by the rich OS. # of by the rich OS.
ERRATA_A53_855873 ?=0 ERRATA_A53_855873 ?=0
# Flag to apply erratum 1530924 workaround during reset. This erratum applies
# to all revisions of Cortex A53 cpu.
ERRATA_A53_1530924 ?=0
# Flag to apply erratum 768277 workaround during reset. This erratum applies # Flag to apply erratum 768277 workaround during reset. This erratum applies
# only to revision r0p0 of the Cortex A55 cpu. # only to revision r0p0 of the Cortex A55 cpu.
ERRATA_A55_768277 ?=0 ERRATA_A55_768277 ?=0
...@@ -154,6 +158,10 @@ ERRATA_A55_903758 ?=0 ...@@ -154,6 +158,10 @@ ERRATA_A55_903758 ?=0
# only to revision <= r1p0 of the Cortex A55 cpu. # only to revision <= r1p0 of the Cortex A55 cpu.
ERRATA_A55_1221012 ?=0 ERRATA_A55_1221012 ?=0
# Flag to apply erratum 1530923 workaround during reset. This erratum applies
# to all revisions of Cortex A55 cpu.
ERRATA_A55_1530923 ?=0
# Flag to apply erratum 806969 workaround during reset. This erratum applies # Flag to apply erratum 806969 workaround during reset. This erratum applies
# only to revision r0p0 of the Cortex A57 cpu. # only to revision r0p0 of the Cortex A57 cpu.
ERRATA_A57_806969 ?=0 ERRATA_A57_806969 ?=0
...@@ -198,10 +206,18 @@ ERRATA_A57_833471 ?=0 ...@@ -198,10 +206,18 @@ ERRATA_A57_833471 ?=0
# only to revision <= r1p3 of the Cortex A57 cpu. # only to revision <= r1p3 of the Cortex A57 cpu.
ERRATA_A57_859972 ?=0 ERRATA_A57_859972 ?=0
# Flag to apply erratum 1319537 workaround during reset. This erratum applies
# to all revisions of Cortex A57 cpu.
ERRATA_A57_1319537 ?=0
# Flag to apply erratum 855971 workaround during reset. This erratum applies # Flag to apply erratum 855971 workaround during reset. This erratum applies
# only to revision <= r0p3 of the Cortex A72 cpu. # only to revision <= r0p3 of the Cortex A72 cpu.
ERRATA_A72_859971 ?=0 ERRATA_A72_859971 ?=0
# Flag to apply erratum 1319367 workaround during reset. This erratum applies
# to all revisions of Cortex A72 cpu.
ERRATA_A72_1319367 ?=0
# Flag to apply erratum 852427 workaround during reset. This erratum applies # Flag to apply erratum 852427 workaround during reset. This erratum applies
# only to revision r0p0 of the Cortex A73 cpu. # only to revision r0p0 of the Cortex A73 cpu.
ERRATA_A73_852427 ?=0 ERRATA_A73_852427 ?=0
...@@ -258,6 +274,10 @@ ERRATA_A76_1791580 ?=0 ...@@ -258,6 +274,10 @@ ERRATA_A76_1791580 ?=0
# only to revision <= r4p0 of the Cortex A76 cpu. # only to revision <= r4p0 of the Cortex A76 cpu.
ERRATA_A76_1800710 ?=0 ERRATA_A76_1800710 ?=0
# Flag to apply erratum 1165522 workaround during reset. This erratum applies
# to all revisions of Cortex A76 cpu.
ERRATA_A76_1165522 ?=0
# Flag to apply erratum 1800714 workaround during reset. This erratum applies # Flag to apply erratum 1800714 workaround during reset. This erratum applies
# only to revision <= r1p1 of the Cortex A77 cpu. # only to revision <= r1p1 of the Cortex A77 cpu.
ERRATA_A77_1800714 ?=0 ERRATA_A77_1800714 ?=0
...@@ -379,6 +399,10 @@ $(eval $(call add_define,ERRATA_A53_843419)) ...@@ -379,6 +399,10 @@ $(eval $(call add_define,ERRATA_A53_843419))
$(eval $(call assert_boolean,ERRATA_A53_855873)) $(eval $(call assert_boolean,ERRATA_A53_855873))
$(eval $(call add_define,ERRATA_A53_855873)) $(eval $(call add_define,ERRATA_A53_855873))
# Process ERRATA_A53_1530924 flag
$(eval $(call assert_boolean,ERRATA_A53_1530924))
$(eval $(call add_define,ERRATA_A53_1530924))
# Process ERRATA_A55_768277 flag # Process ERRATA_A55_768277 flag
$(eval $(call assert_boolean,ERRATA_A55_768277)) $(eval $(call assert_boolean,ERRATA_A55_768277))
$(eval $(call add_define,ERRATA_A55_768277)) $(eval $(call add_define,ERRATA_A55_768277))
...@@ -403,6 +427,10 @@ $(eval $(call add_define,ERRATA_A55_903758)) ...@@ -403,6 +427,10 @@ $(eval $(call add_define,ERRATA_A55_903758))
$(eval $(call assert_boolean,ERRATA_A55_1221012)) $(eval $(call assert_boolean,ERRATA_A55_1221012))
$(eval $(call add_define,ERRATA_A55_1221012)) $(eval $(call add_define,ERRATA_A55_1221012))
# Process ERRATA_A55_1530923 flag
$(eval $(call assert_boolean,ERRATA_A55_1530923))
$(eval $(call add_define,ERRATA_A55_1530923))
# Process ERRATA_A57_806969 flag # Process ERRATA_A57_806969 flag
$(eval $(call assert_boolean,ERRATA_A57_806969)) $(eval $(call assert_boolean,ERRATA_A57_806969))
$(eval $(call add_define,ERRATA_A57_806969)) $(eval $(call add_define,ERRATA_A57_806969))
...@@ -447,10 +475,18 @@ $(eval $(call add_define,ERRATA_A57_833471)) ...@@ -447,10 +475,18 @@ $(eval $(call add_define,ERRATA_A57_833471))
$(eval $(call assert_boolean,ERRATA_A57_859972)) $(eval $(call assert_boolean,ERRATA_A57_859972))
$(eval $(call add_define,ERRATA_A57_859972)) $(eval $(call add_define,ERRATA_A57_859972))
# Process ERRATA_A57_1319537 flag
$(eval $(call assert_boolean,ERRATA_A57_1319537))
$(eval $(call add_define,ERRATA_A57_1319537))
# Process ERRATA_A72_859971 flag # Process ERRATA_A72_859971 flag
$(eval $(call assert_boolean,ERRATA_A72_859971)) $(eval $(call assert_boolean,ERRATA_A72_859971))
$(eval $(call add_define,ERRATA_A72_859971)) $(eval $(call add_define,ERRATA_A72_859971))
# Process ERRATA_A72_1319367 flag
$(eval $(call assert_boolean,ERRATA_A72_1319367))
$(eval $(call add_define,ERRATA_A72_1319367))
# Process ERRATA_A73_852427 flag # Process ERRATA_A73_852427 flag
$(eval $(call assert_boolean,ERRATA_A73_852427)) $(eval $(call assert_boolean,ERRATA_A73_852427))
$(eval $(call add_define,ERRATA_A73_852427)) $(eval $(call add_define,ERRATA_A73_852427))
...@@ -507,6 +543,10 @@ $(eval $(call add_define,ERRATA_A76_1791580)) ...@@ -507,6 +543,10 @@ $(eval $(call add_define,ERRATA_A76_1791580))
$(eval $(call assert_boolean,ERRATA_A76_1800710)) $(eval $(call assert_boolean,ERRATA_A76_1800710))
$(eval $(call add_define,ERRATA_A76_1800710)) $(eval $(call add_define,ERRATA_A76_1800710))
# Process ERRATA_A76_1165522 flag
$(eval $(call assert_boolean,ERRATA_A76_1165522))
$(eval $(call add_define,ERRATA_A76_1165522))
# Process ERRATA_A77_1800714 flag # Process ERRATA_A77_1800714 flag
$(eval $(call assert_boolean,ERRATA_A77_1800714)) $(eval $(call assert_boolean,ERRATA_A77_1800714))
$(eval $(call add_define,ERRATA_A77_1800714)) $(eval $(call add_define,ERRATA_A77_1800714))
...@@ -580,3 +620,10 @@ ifneq (${ERRATA_A53_835769},0) ...@@ -580,3 +620,10 @@ ifneq (${ERRATA_A53_835769},0)
TF_CFLAGS_aarch64 += -mfix-cortex-a53-835769 TF_CFLAGS_aarch64 += -mfix-cortex-a53-835769
TF_LDFLAGS_aarch64 += --fix-cortex-a53-835769 TF_LDFLAGS_aarch64 += --fix-cortex-a53-835769
endif endif
ifneq ($(filter 1,${ERRATA_A53_1530924} ${ERRATA_A55_1530923} \
${ERRATA_A57_1319537} ${ERRATA_A72_1319367} ${ERRATA_A76_1165522}),)
ERRATA_SPECULATIVE_AT := 1
else
ERRATA_SPECULATIVE_AT := 0
endif
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