Commit e6e10ecc authored by Alexei Fedorov's avatar Alexei Fedorov
Browse files

FVP: Add support for GICv4 extension



This patch adds support for GICv4 extension for FVP platform.

Change-Id: Ia389b61266af669b1ca9b999a8b76476cab214f4
Signed-off-by: default avatarAlexei Fedorov <Alexei.Fedorov@arm.com>
parent 5875f266
...@@ -52,10 +52,18 @@ ...@@ -52,10 +52,18 @@
#define DEVICE1_BASE UL(0x2e000000) #define DEVICE1_BASE UL(0x2e000000)
#define DEVICE1_SIZE UL(0x1A00000) #define DEVICE1_SIZE UL(0x1A00000)
#else #else
/* GICv2 and GICv3 mapping: GICD + CORE_COUNT * 128KB */
#define DEVICE1_BASE BASE_GICD_BASE #define DEVICE1_BASE BASE_GICD_BASE
#if GIC_ENABLE_V4_EXTN
/* GICv4 mapping: GICD + CORE_COUNT * 256KB */
#define DEVICE1_SIZE ((BASE_GICR_BASE - BASE_GICD_BASE) + \
(PLATFORM_CORE_COUNT * 0x40000))
#else
/* GICv2 and GICv3 mapping: GICD + CORE_COUNT * 128KB */
#define DEVICE1_SIZE ((BASE_GICR_BASE - BASE_GICD_BASE) + \ #define DEVICE1_SIZE ((BASE_GICR_BASE - BASE_GICD_BASE) + \
(PLATFORM_CORE_COUNT * 0x20000)) (PLATFORM_CORE_COUNT * 0x20000))
#endif /* GIC_ENABLE_V4_EXTN */
#define NSRAM_BASE UL(0x2e000000) #define NSRAM_BASE UL(0x2e000000)
#define NSRAM_SIZE UL(0x10000) #define NSRAM_SIZE UL(0x10000)
#endif #endif
......
...@@ -50,12 +50,12 @@ $(eval $(call add_define,FVP_INTERCONNECT_DRIVER)) ...@@ -50,12 +50,12 @@ $(eval $(call add_define,FVP_INTERCONNECT_DRIVER))
# Choose the GIC sources depending upon the how the FVP will be invoked # Choose the GIC sources depending upon the how the FVP will be invoked
ifeq (${FVP_USE_GIC_DRIVER},$(filter ${FVP_USE_GIC_DRIVER},FVP_GICV3 FVP_GIC600)) ifeq (${FVP_USE_GIC_DRIVER},$(filter ${FVP_USE_GIC_DRIVER},FVP_GICV3 FVP_GIC600))
# GIC500 is the default option in case GICV3_IMPL is not set
ifeq (${FVP_USE_GIC_DRIVER}, FVP_GIC600) ifeq (${FVP_USE_GIC_DRIVER}, FVP_GIC600)
GICV3_IMPL := GIC600 GICV3_IMPL := GIC600
endif endif
# GIC500 is the default option in case GICV3_IMPL is not set
GICV3_OVERRIDE_DISTIF_PWR_OPS := 1 GICV3_OVERRIDE_DISTIF_PWR_OPS := 1
# Include GICv3 driver files # Include GICv3 driver files
...@@ -66,6 +66,15 @@ FVP_GIC_SOURCES := ${GICV3_SOURCES} \ ...@@ -66,6 +66,15 @@ FVP_GIC_SOURCES := ${GICV3_SOURCES} \
plat/arm/common/arm_gicv3.c plat/arm/common/arm_gicv3.c
else ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV2) else ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV2)
# No GICv4 extension
GIC_ENABLE_V4_EXTN := 0
$(eval $(call add_define,GIC_ENABLE_V4_EXTN))
# No support for extended PPI and SPI range
GIC_EXT_INTID := 0
$(eval $(call add_define,GIC_EXT_INTID))
FVP_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \ FVP_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \
drivers/arm/gic/v2/gicv2_main.c \ drivers/arm/gic/v2/gicv2_main.c \
drivers/arm/gic/v2/gicv2_helpers.c \ drivers/arm/gic/v2/gicv2_helpers.c \
......
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