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adam.huang
Arm Trusted Firmware
Commits
e869310f
Commit
e869310f
authored
Jun 18, 2014
by
danh-arm
Browse files
Merge pull request #135 from soby-mathew/sm/remove-reinit-of-timers
Remove re-initialisation of system timers after warm boot for FVP
parents
5d292ab6
b1e71b20
Changes
1
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Inline
Side-by-side
plat/fvp/fvp_pm.c
View file @
e869310f
...
...
@@ -290,7 +290,7 @@ int fvp_affinst_on_finish(unsigned long mpidr,
int
rc
=
PSCI_E_SUCCESS
;
unsigned
long
linear_id
,
cpu_setup
;
mailbox_t
*
fvp_mboxes
;
unsigned
int
gicd_base
,
gicc_base
,
reg_val
,
ectlr
;
unsigned
int
gicd_base
,
gicc_base
,
ectlr
;
switch
(
afflvl
)
{
...
...
@@ -354,17 +354,6 @@ int fvp_affinst_on_finish(unsigned long mpidr,
/* TODO: This setup is needed only after a cold boot */
gic_pcpu_distif_setup
(
gicd_base
);
/* Allow access to the System counter timer module */
reg_val
=
(
1
<<
CNTACR_RPCT_SHIFT
)
|
(
1
<<
CNTACR_RVCT_SHIFT
);
reg_val
|=
(
1
<<
CNTACR_RFRQ_SHIFT
)
|
(
1
<<
CNTACR_RVOFF_SHIFT
);
reg_val
|=
(
1
<<
CNTACR_RWVT_SHIFT
)
|
(
1
<<
CNTACR_RWPT_SHIFT
);
mmio_write_32
(
SYS_TIMCTL_BASE
+
CNTACR_BASE
(
0
),
reg_val
);
mmio_write_32
(
SYS_TIMCTL_BASE
+
CNTACR_BASE
(
1
),
reg_val
);
reg_val
=
(
1
<<
CNTNSAR_NS_SHIFT
(
0
))
|
(
1
<<
CNTNSAR_NS_SHIFT
(
1
));
mmio_write_32
(
SYS_TIMCTL_BASE
+
CNTNSAR
,
reg_val
);
break
;
default:
...
...
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