Tegra194: remove GPU, MPCORE and PTC registers from streamid list

GPU, MPCORE and PTC clients are changed and not going through SMMU.
Removing it from streamid list.

Change-Id: I14b450a11f02ad6c1a97e67e487d6d624911d019
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>

plat/nvidia/tegra/soc/t194/drivers/include/memctrl_plat_config.h

@@ -297,15 +297,12 @@
  * Array to hold stream_id override config register offsets
  ******************************************************************************/
 const static uint32_t mc_streamid_override_regs[] = {
-	MC_STREAMID_OVERRIDE_CFG_PTCR,
 	MC_STREAMID_OVERRIDE_CFG_HDAR,
 	MC_STREAMID_OVERRIDE_CFG_HOST1XDMAR,
 	MC_STREAMID_OVERRIDE_CFG_NVENCSRD,
 	MC_STREAMID_OVERRIDE_CFG_SATAR,
-	MC_STREAMID_OVERRIDE_CFG_MPCORER,
 	MC_STREAMID_OVERRIDE_CFG_NVENCSWR,
 	MC_STREAMID_OVERRIDE_CFG_HDAW,
-	MC_STREAMID_OVERRIDE_CFG_MPCOREW,
 	MC_STREAMID_OVERRIDE_CFG_SATAW,
 	MC_STREAMID_OVERRIDE_CFG_ISPRA,
 	MC_STREAMID_OVERRIDE_CFG_ISPFALR,
@@ -317,8 +314,6 @@ const static uint32_t mc_streamid_override_regs[] = {
 	MC_STREAMID_OVERRIDE_CFG_XUSB_DEVW,
 	MC_STREAMID_OVERRIDE_CFG_TSECSRD,
 	MC_STREAMID_OVERRIDE_CFG_TSECSWR,
-	MC_STREAMID_OVERRIDE_CFG_GPUSRD,
-	MC_STREAMID_OVERRIDE_CFG_GPUSWR,
 	MC_STREAMID_OVERRIDE_CFG_SDMMCRA,
 	MC_STREAMID_OVERRIDE_CFG_SDMMCR,
 	MC_STREAMID_OVERRIDE_CFG_SDMMCRAB,
@@ -342,8 +337,6 @@ const static uint32_t mc_streamid_override_regs[] = {
 	MC_STREAMID_OVERRIDE_CFG_ETRW,
 	MC_STREAMID_OVERRIDE_CFG_TSECSRDB,
 	MC_STREAMID_OVERRIDE_CFG_TSECSWRB,
-	MC_STREAMID_OVERRIDE_CFG_GPUSRD2,
-	MC_STREAMID_OVERRIDE_CFG_GPUSWR2,
 	MC_STREAMID_OVERRIDE_CFG_AXISR,
 	MC_STREAMID_OVERRIDE_CFG_AXISW,
 	MC_STREAMID_OVERRIDE_CFG_EQOSR,
@@ -433,15 +426,12 @@ const static uint32_t mc_streamid_override_regs[] = {
  * Array to hold the security configs for stream IDs
  ******************************************************************************/
 const static mc_streamid_security_cfg_t mc_streamid_sec_cfgs[] = {
-	mc_make_sec_cfg(PTCR, NON_SECURE, OVERRIDE, ENABLE),
 	mc_make_sec_cfg(HDAR, NON_SECURE, OVERRIDE, ENABLE),
 	mc_make_sec_cfg(HOST1XDMAR, NON_SECURE, NO_OVERRIDE, ENABLE),
 	mc_make_sec_cfg(NVENCSRD, NON_SECURE, NO_OVERRIDE, ENABLE),
 	mc_make_sec_cfg(SATAR, NON_SECURE, OVERRIDE, ENABLE),
-	mc_make_sec_cfg(MPCORER, NON_SECURE, OVERRIDE, ENABLE),
 	mc_make_sec_cfg(NVENCSWR, NON_SECURE, NO_OVERRIDE, ENABLE),
 	mc_make_sec_cfg(HDAW, NON_SECURE, OVERRIDE, ENABLE),
-	mc_make_sec_cfg(MPCOREW, NON_SECURE, OVERRIDE, ENABLE),
 	mc_make_sec_cfg(SATAW, NON_SECURE, OVERRIDE, ENABLE),
 	mc_make_sec_cfg(ISPRA, NON_SECURE, NO_OVERRIDE, ENABLE),
 	mc_make_sec_cfg(ISPFALR, NON_SECURE, NO_OVERRIDE, ENABLE),
@@ -453,8 +443,6 @@ const static mc_streamid_security_cfg_t mc_streamid_sec_cfgs[] = {
 	mc_make_sec_cfg(XUSB_DEVW, NON_SECURE, OVERRIDE, ENABLE),
 	mc_make_sec_cfg(TSECSRD, NON_SECURE, NO_OVERRIDE, ENABLE),
 	mc_make_sec_cfg(TSECSWR, NON_SECURE, NO_OVERRIDE, ENABLE),
-	mc_make_sec_cfg(GPUSRD, SECURE, NO_OVERRIDE, DISABLE),
-	mc_make_sec_cfg(GPUSWR, SECURE, NO_OVERRIDE, DISABLE),
 	mc_make_sec_cfg(SDMMCRA, NON_SECURE, OVERRIDE, ENABLE),
 	mc_make_sec_cfg(SDMMCR, NON_SECURE, OVERRIDE, ENABLE),
 	mc_make_sec_cfg(SDMMCRAB, NON_SECURE, OVERRIDE, ENABLE),
@@ -478,8 +466,6 @@ const static mc_streamid_security_cfg_t mc_streamid_sec_cfgs[] = {
 	mc_make_sec_cfg(ETRW, NON_SECURE, OVERRIDE, ENABLE),
 	mc_make_sec_cfg(TSECSRDB, NON_SECURE, NO_OVERRIDE, ENABLE),
 	mc_make_sec_cfg(TSECSWRB, NON_SECURE, NO_OVERRIDE, ENABLE),
-	mc_make_sec_cfg(GPUSRD2, SECURE, NO_OVERRIDE, DISABLE),
-	mc_make_sec_cfg(GPUSWR2, SECURE, NO_OVERRIDE, DISABLE),
 	mc_make_sec_cfg(AXISR, SECURE, NO_OVERRIDE, DISABLE),
 	mc_make_sec_cfg(AXISW, SECURE, NO_OVERRIDE, DISABLE),
 	mc_make_sec_cfg(EQOSR, NON_SECURE, OVERRIDE, ENABLE),
@@ -571,13 +557,11 @@ const static mc_streamid_security_cfg_t mc_streamid_sec_cfgs[] = {
 const static mc_txn_override_cfg_t mc_txn_override_cfgs[] = {
 	mc_make_txn_override_cfg(NVENCSWR, CGID_TAG_ADR),
 	mc_make_txn_override_cfg(HDAW, CGID_TAG_ADR),
-	mc_make_txn_override_cfg(MPCOREW, CGID_TAG_ADR),
 	mc_make_txn_override_cfg(SATAW, CGID_TAG_ADR),
 	mc_make_txn_override_cfg(ISPWB, CGID_TAG_ADR),
 	mc_make_txn_override_cfg(XUSB_HOSTW, CGID_TAG_ADR),
 	mc_make_txn_override_cfg(XUSB_DEVW, CGID_TAG_ADR),
 	mc_make_txn_override_cfg(TSECSWR, CGID_TAG_ADR),
-	mc_make_txn_override_cfg(GPUSWR, CGID_TAG_ADR),
 	mc_make_txn_override_cfg(SDMMCWA, CGID_TAG_ADR),
 	mc_make_txn_override_cfg(SDMMCW, CGID_TAG_ADR),
 	mc_make_txn_override_cfg(SDMMCWAB, CGID_TAG_ADR),
@@ -588,7 +572,6 @@ const static mc_txn_override_cfg_t mc_txn_override_cfgs[] = {
 	mc_make_txn_override_cfg(SESWR, CGID_TAG_ADR),
 	mc_make_txn_override_cfg(ETRW, CGID_TAG_ADR),
 	mc_make_txn_override_cfg(TSECSWRB, CGID_TAG_ADR),
-	mc_make_txn_override_cfg(GPUSWR2, CGID_TAG_ADR),
 	mc_make_txn_override_cfg(AXISW, CGID_TAG_ADR),
 	mc_make_txn_override_cfg(EQOSW, CGID_TAG_ADR),
 	mc_make_txn_override_cfg(UFSHCW, CGID_TAG_ADR),

plat/nvidia/tegra/soc/t194/drivers/include/smmu_plat_config.h

@@ -13,15 +13,12 @@
 
 static __attribute__((aligned(16))) smmu_regs_t smmu_ctx_regs[] = {
 	_START_OF_TABLE_,
-	mc_make_sid_security_cfg(PTCR),
 	mc_make_sid_security_cfg(HDAR),
 	mc_make_sid_security_cfg(HOST1XDMAR),
 	mc_make_sid_security_cfg(NVENCSRD),
 	mc_make_sid_security_cfg(SATAR),
-	mc_make_sid_security_cfg(MPCORER),
 	mc_make_sid_security_cfg(NVENCSWR),
 	mc_make_sid_security_cfg(HDAW),
-	mc_make_sid_security_cfg(MPCOREW),
 	mc_make_sid_security_cfg(SATAW),
 	mc_make_sid_security_cfg(ISPRA),
 	mc_make_sid_security_cfg(ISPFALR),
@@ -33,8 +30,6 @@ static __attribute__((aligned(16))) smmu_regs_t smmu_ctx_regs[] = {
 	mc_make_sid_security_cfg(XUSB_DEVW),
 	mc_make_sid_security_cfg(TSECSRD),
 	mc_make_sid_security_cfg(TSECSWR),
-	mc_make_sid_security_cfg(GPUSRD),
-	mc_make_sid_security_cfg(GPUSWR),
 	mc_make_sid_security_cfg(SDMMCRA),
 	mc_make_sid_security_cfg(SDMMCR),
 	mc_make_sid_security_cfg(SDMMCRAB),
@@ -58,8 +53,6 @@ static __attribute__((aligned(16))) smmu_regs_t smmu_ctx_regs[] = {
 	mc_make_sid_security_cfg(ETRW),
 	mc_make_sid_security_cfg(TSECSRDB),
 	mc_make_sid_security_cfg(TSECSWRB),
-	mc_make_sid_security_cfg(GPUSRD2),
-	mc_make_sid_security_cfg(GPUSWR2),
 	mc_make_sid_security_cfg(AXISR),
 	mc_make_sid_security_cfg(AXISW),
 	mc_make_sid_security_cfg(EQOSR),
@@ -143,15 +136,12 @@ static __attribute__((aligned(16))) smmu_regs_t smmu_ctx_regs[] = {
 	mc_make_sid_security_cfg(MIU2W),
 	mc_make_sid_security_cfg(MIU3R),
 	mc_make_sid_security_cfg(MIU3W),
-	mc_make_sid_override_cfg(PTCR),
 	mc_make_sid_override_cfg(HDAR),
 	mc_make_sid_override_cfg(HOST1XDMAR),
 	mc_make_sid_override_cfg(NVENCSRD),
 	mc_make_sid_override_cfg(SATAR),
-	mc_make_sid_override_cfg(MPCORER),
 	mc_make_sid_override_cfg(NVENCSWR),
 	mc_make_sid_override_cfg(HDAW),
-	mc_make_sid_override_cfg(MPCOREW),
 	mc_make_sid_override_cfg(SATAW),
 	mc_make_sid_override_cfg(ISPRA),
 	mc_make_sid_override_cfg(ISPFALR),
@@ -163,8 +153,6 @@ static __attribute__((aligned(16))) smmu_regs_t smmu_ctx_regs[] = {
 	mc_make_sid_override_cfg(XUSB_DEVW),
 	mc_make_sid_override_cfg(TSECSRD),
 	mc_make_sid_override_cfg(TSECSWR),
-	mc_make_sid_override_cfg(GPUSRD),
-	mc_make_sid_override_cfg(GPUSWR),
 	mc_make_sid_override_cfg(SDMMCRA),
 	mc_make_sid_override_cfg(SDMMCR),
 	mc_make_sid_override_cfg(SDMMCRAB),
@@ -188,8 +176,6 @@ static __attribute__((aligned(16))) smmu_regs_t smmu_ctx_regs[] = {
 	mc_make_sid_override_cfg(ETRW),
 	mc_make_sid_override_cfg(TSECSRDB),
 	mc_make_sid_override_cfg(TSECSWRB),
-	mc_make_sid_override_cfg(GPUSRD2),
-	mc_make_sid_override_cfg(GPUSWR2),
 	mc_make_sid_override_cfg(AXISR),
 	mc_make_sid_override_cfg(AXISW),
 	mc_make_sid_override_cfg(EQOSR),