Merge changes from topic "db/unsigned_long" into integration

* changes:
  Unsigned long should not be used as per coding guidelines
  SCTLR and ACTLR are 32-bit for AArch32 and 64-bit for AArch64

bl1/aarch64/bl1_arch_setup.c

 /*
- * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -23,7 +23,7 @@ void bl1_arch_setup(void)
  ******************************************************************************/
 void bl1_arch_next_el_setup(void)
 {
-	unsigned long next_sctlr;
+	u_register_t next_sctlr;
 
 	/* Use the same endianness than the current BL */
 	next_sctlr = (read_sctlr_el3() & SCTLR_EE_BIT);

bl1/bl1_fwu.c

@@ -483,7 +483,7 @@ static int bl1_fwu_image_auth(unsigned int image_id,
 	 * Flush image_info to memory so that other
 	 * secure world images can see changes.
 	 */
-	flush_dcache_range((unsigned long)&image_desc->image_info,
+	flush_dcache_range((uintptr_t)&image_desc->image_info,
 		sizeof(image_info_t));
 
 	INFO("BL1-FWU: Authentication was successful\n");

bl1/bl1_main.c

@@ -49,7 +49,7 @@ void bl1_calc_bl2_mem_layout(const meminfo_t *bl1_mem_layout,
 	bl2_mem_layout->total_base = bl1_mem_layout->total_base;
 	bl2_mem_layout->total_size = BL1_RW_BASE - bl1_mem_layout->total_base;
 
-	flush_dcache_range((unsigned long)bl2_mem_layout, sizeof(meminfo_t));
+	flush_dcache_range((uintptr_t)bl2_mem_layout, sizeof(meminfo_t));
 }
 
 /*******************************************************************************

lib/el3_runtime/aarch64/context_mgmt.c

@@ -69,7 +69,7 @@ void cm_setup_context(cpu_context_t *ctx, const entry_point_info_t *ep)
 	uint32_t scr_el3;
 	el3_state_t *state;
 	gp_regs_t *gp_regs;
-	unsigned long sctlr_elx, actlr_elx;
+	u_register_t sctlr_elx, actlr_elx;
 
 	assert(ctx != NULL);