Commit eb75518d authored by Samuel Holland's avatar Samuel Holland
Browse files

allwinner: Enable clock before resetting I2C/RSB



The clock must be running for the module to be reset.
Signed-off-by: default avatarSamuel Holland <samuel@sholland.org>
Change-Id: Ic8fafc946f3a1a697174b91288e357ffa033ab9a
parent 1a433965
...@@ -150,16 +150,16 @@ int sunxi_init_platform_r_twi(uint16_t socid, bool use_rsb) ...@@ -150,16 +150,16 @@ int sunxi_init_platform_r_twi(uint16_t socid, bool use_rsb)
/* set both pins to pull-up */ /* set both pins to pull-up */
mmio_clrsetbits_32(SUNXI_R_PIO_BASE + 0x1c, 0x0fU, 0x5U); mmio_clrsetbits_32(SUNXI_R_PIO_BASE + 0x1c, 0x0fU, 0x5U);
/* assert, then de-assert reset of I2C/RSB controller */
mmio_clrbits_32(SUNXI_R_PRCM_BASE + reset_offset, device_bit);
mmio_setbits_32(SUNXI_R_PRCM_BASE + reset_offset, device_bit);
/* un-gate clock */ /* un-gate clock */
if (socid != SUNXI_SOC_H6) if (socid != SUNXI_SOC_H6)
mmio_setbits_32(SUNXI_R_PRCM_BASE + 0x28, device_bit); mmio_setbits_32(SUNXI_R_PRCM_BASE + 0x28, device_bit);
else else
mmio_setbits_32(SUNXI_R_PRCM_BASE + 0x19c, device_bit | BIT(0)); mmio_setbits_32(SUNXI_R_PRCM_BASE + 0x19c, device_bit | BIT(0));
/* assert, then de-assert reset of I2C/RSB controller */
mmio_clrbits_32(SUNXI_R_PRCM_BASE + reset_offset, device_bit);
mmio_setbits_32(SUNXI_R_PRCM_BASE + reset_offset, device_bit);
return 0; return 0;
} }
......
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