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Commit ec3e2f67 authored by Lad Prabhakar's avatar Lad Prabhakar
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renesas: rzg: Add support to identify HopeRun HiHope RZ/G2H board 



Add support to identify HopeRun HiHope RZ/G2H board.
Signed-off-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: default avatarBiju Das <biju.das.jz@bp.renesas.com>
Change-Id: I6b28350ef50595fea9a1b1b7353fcabaeb935970
parent 4a6f4d2e
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drivers/renesas/rzg/board/board.c
View file @ ec3e2f67
/*
* Copyright (c) 2020, Renesas Electronics Corporation. All rights reserved.
* Copyright (c) 2020-2021, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
......@@ -13,7 +13,11 @@
#include "rcar_def.h"
#ifndef BOARD_DEFAULT
#if (RCAR_LSI == RZ_G2H)
#define BOARD_DEFAULT (BOARD_HIHOPE_RZ_G2H << BOARD_CODE_SHIFT)
#else
#define BOARD_DEFAULT (BOARD_HIHOPE_RZ_G2M << BOARD_CODE_SHIFT)
#endif /* RCAR_LSI == RZ_G2H */
#endif /* BOARD_DEFAULT */
#define BOARD_CODE_MASK (0xF8U)
......@@ -27,9 +31,11 @@
#define GP5_25_BIT (0x01U << 25)
#define HM_ID { 0x10U, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU }
#define HH_ID HM_ID
const char *g_board_tbl[] = {
[BOARD_HIHOPE_RZ_G2M] = "HiHope RZ/G2M",
[BOARD_HIHOPE_RZ_G2H] = "HiHope RZ/G2H",
[BOARD_UNKNOWN] = "unknown"
};
......@@ -38,6 +44,7 @@ void rzg_get_board_type(uint32_t *type, uint32_t *rev)
static uint8_t board_id = BOARD_ID_UNKNOWN;
const uint8_t board_tbl[][8] = {
[BOARD_HIHOPE_RZ_G2M] = HM_ID,
[BOARD_HIHOPE_RZ_G2H] = HH_ID,
};
uint32_t reg, boardInfo;
......@@ -50,15 +57,16 @@ void rzg_get_board_type(uint32_t *type, uint32_t *rev)
if (*type >= ARRAY_SIZE(board_tbl)) {
/* no revision information, set Rev0.0. */
*rev = 0;
return;
}
reg = mmio_read_32(RCAR_PRR);
if ((reg & PRR_CUT_MASK) == RCAR_M3_CUT_VER11) {
*rev = board_tbl[*type][(uint8_t)(board_id & BOARD_REV_MASK)];
} else {
reg = mmio_read_32(RCAR_PRR);
if ((reg & PRR_CUT_MASK) == RCAR_M3_CUT_VER11) {
*rev = board_tbl[*type][(uint8_t)(board_id & BOARD_REV_MASK)];
} else {
boardInfo = mmio_read_32(GPIO_INDT5) &
(GP5_19_BIT | GP5_21_BIT);
*rev = (((boardInfo & GP5_19_BIT) >> 14) |
((boardInfo & GP5_21_BIT) >> 17)) + 0x30U;
}
reg = mmio_read_32(GPIO_INDT5);
boardInfo = reg & (GP5_19_BIT | GP5_21_BIT);
*rev = (((boardInfo & GP5_19_BIT) >> 14) |
((boardInfo & GP5_21_BIT) >> 17)) + 0x30U;
}
}
drivers/renesas/rzg/board/board.h
View file @ ec3e2f67
/*
* Copyright (c) 2020, Renesas Electronics Corporation. All rights reserved.
* Copyright (c) 2020-2021, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
......@@ -9,6 +9,7 @@
enum rzg2_board_id {
BOARD_HIHOPE_RZ_G2M = 0,
BOARD_HIHOPE_RZ_G2H,
BOARD_UNKNOWN
};
......
plat/renesas/common/bl2_cpg_init.c
View file @ ec3e2f67
/*
* Copyright (c) 2015-2020, Renesas Electronics Corporation. All rights reserved.
* Copyright (c) 2015-2021, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
......@@ -13,7 +13,8 @@
static void bl2_secure_cpg_init(void);
#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RCAR_H3) || (RCAR_LSI == RCAR_H3N)
#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RCAR_H3) || \
(RCAR_LSI == RCAR_H3N) || (RCAR_LSI == RZ_G2H)
static void bl2_realtime_cpg_init_h3(void);
static void bl2_system_cpg_init_h3(void);
#endif
......@@ -106,7 +107,8 @@ static void bl2_secure_cpg_init(void)
cpg_write(SCSRSTECR11, 0x00000000U);
}
#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RCAR_H3) || (RCAR_LSI == RCAR_H3N)
#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RCAR_H3) || \
(RCAR_LSI == RCAR_H3N) || (RCAR_LSI == RZ_G2H)
static void bl2_realtime_cpg_init_h3(void)
{
uint32_t cut = mmio_read_32(RCAR_PRR) & PRR_CUT_MASK;
......@@ -360,7 +362,7 @@ void bl2_cpg_init(void)
panic();
break;
}
#elif (RCAR_LSI == RCAR_H3) || (RCAR_LSI == RCAR_H3N)
#elif (RCAR_LSI == RCAR_H3) || (RCAR_LSI == RCAR_H3N) || (RCAR_LSI == RZ_G2H)
bl2_realtime_cpg_init_h3();
#elif (RCAR_LSI == RCAR_M3) || (RCAR_LSI == RZ_G2M)
bl2_realtime_cpg_init_m3();
......@@ -406,7 +408,7 @@ void bl2_system_cpg_init(void)
panic();
break;
}
#elif (RCAR_LSI == RCAR_H3) || (RCAR_LSI == RCAR_H3N)
#elif (RCAR_LSI == RCAR_H3) || (RCAR_LSI == RCAR_H3N) || (RCAR_LSI == RZ_G2H)
bl2_system_cpg_init_h3();
#elif (RCAR_LSI == RCAR_M3) || (RCAR_LSI == RZ_G2M)
bl2_system_cpg_init_m3();
......
plat/renesas/rzg/bl2_plat_setup.c
View file @ ec3e2f67
......@@ -78,6 +78,9 @@ static void bl2_init_generic_timer(void);
#if RCAR_LSI == RZ_G2M
#define TARGET_PRODUCT PRR_PRODUCT_M3
#define TARGET_NAME "RZ/G2M"
#elif RCAR_LSI == RZ_G2H
#define TARGET_PRODUCT PRR_PRODUCT_H3
#define TARGET_NAME "RZ/G2H"
#elif RCAR_LSI == RCAR_AUTO
#define TARGET_NAME "RZ/G2M"
#endif /* RCAR_LSI == RZ_G2M */
......@@ -424,6 +427,10 @@ static void bl2_populate_compatible_string(void *dt)
ret = fdt_setprop_string(dt, 0, "compatible",
"hoperun,hihope-rzg2m");
break;
case BOARD_HIHOPE_RZ_G2H:
ret = fdt_setprop_string(dt, 0, "compatible",
"hoperun,hihope-rzg2h");
break;
default:
NOTICE("BL2: Cannot set compatible string, board unsupported\n");
panic();
......@@ -441,6 +448,10 @@ static void bl2_populate_compatible_string(void *dt)
ret = fdt_appendprop_string(dt, 0, "compatible",
"renesas,r8a774a1");
break;
case PRR_PRODUCT_H3:
ret = fdt_appendprop_string(dt, 0, "compatible",
"renesas,r8a774e1");
break;
default:
NOTICE("BL2: Cannot set compatible string, SoC unsupported\n");
panic();
......@@ -560,6 +571,26 @@ static void bl2_advertise_dram_size(uint32_t product)
dram_config[1] = 0x80000000ULL;
dram_config[5] = 0x80000000ULL;
break;
case PRR_PRODUCT_H3:
#if (RCAR_DRAM_LPDDR4_MEMCONF == 0)
/* 4GB(1GBx4) */
dram_config[1] = 0x40000000ULL;
dram_config[3] = 0x40000000ULL;
dram_config[5] = 0x40000000ULL;
dram_config[7] = 0x40000000ULL;
#elif (RCAR_DRAM_LPDDR4_MEMCONF == 1) && (RCAR_DRAM_CHANNEL == 5) && \
(RCAR_DRAM_SPLIT == 2)
/* 4GB(2GBx2 2ch split) */
dram_config[1] = 0x80000000ULL;
dram_config[3] = 0x80000000ULL;
#elif (RCAR_DRAM_LPDDR4_MEMCONF == 1) && (RCAR_DRAM_CHANNEL == 15)
/* 8GB(2GBx4: default) */
dram_config[1] = 0x80000000ULL;
dram_config[3] = 0x80000000ULL;
dram_config[5] = 0x80000000ULL;
dram_config[7] = 0x80000000ULL;
#endif /* RCAR_DRAM_LPDDR4_MEMCONF == 0 */
break;
default:
NOTICE("BL2: Detected invalid DRAM entries\n");
break;
......@@ -578,6 +609,7 @@ void bl2_el3_early_platform_setup(u_register_t arg1, u_register_t arg2,
const char *unknown = "unknown";
const char *cpu_ca57 = "CA57";
const char *cpu_ca53 = "CA53";
const char *product_g2h = "G2H";
const char *product_g2m = "G2M";
const char *boot_hyper80 = "HyperFlash(80MHz)";
const char *boot_qspi40 = "QSPI Flash(40MHz)";
......@@ -646,6 +678,9 @@ void bl2_el3_early_platform_setup(u_register_t arg1, u_register_t arg2,
case PRR_PRODUCT_M3:
str = product_g2m;
break;
case PRR_PRODUCT_H3:
str = product_g2h;
break;
default:
str = unknown;
break;
......@@ -671,6 +706,7 @@ void bl2_el3_early_platform_setup(u_register_t arg1, u_register_t arg2,
switch (type) {
case BOARD_HIHOPE_RZ_G2M:
case BOARD_HIHOPE_RZ_G2H:
break;
default:
type = BOARD_UNKNOWN;
......
plat/renesas/rzg/platform.mk
View file @ ec3e2f67
......@@ -32,6 +32,21 @@ else
endif
$(eval $(call add_define,RCAR_LSI_CUT))
endif
else ifeq (${LSI},G2H)
RCAR_LSI:=${RZ_G2H}
ifndef LSI_CUT
# enable compatible function.
RCAR_LSI_CUT_COMPAT := 1
$(eval $(call add_define,RCAR_LSI_CUT_COMPAT))
else
# disable compatible function.
ifeq (${LSI_CUT},30)
RCAR_LSI_CUT:=20
else
$(error "Error: ${LSI_CUT} is not supported.")
endif
$(eval $(call add_define,RCAR_LSI_CUT))
endif
else
$(error "Error: ${LSI} is not supported.")
endif
......
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