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adam.huang
Arm Trusted Firmware
Commits
f422a7bf
Commit
f422a7bf
authored
Jan 07, 2021
by
Olivier Deprez
Committed by
TrustedFirmware Code Review
Jan 07, 2021
Browse files
Merge "AArch64: Fix assertions in processing dynamic relocations" into integration
parents
a59085b5
db9736e3
Changes
1
Hide whitespace changes
Inline
Side-by-side
lib/aarch64/misc_helpers.S
View file @
f422a7bf
/*
/*
*
Copyright
(
c
)
2013
-
202
0
,
A
RM
Limited
and
Contributors
.
All
rights
reserved
.
*
Copyright
(
c
)
2013
-
202
1
,
A
rm
Limited
and
Contributors
.
All
rights
reserved
.
*
*
*
SPDX
-
License
-
Identifier
:
BSD
-
3
-
Clause
*
SPDX
-
License
-
Identifier
:
BSD
-
3
-
Clause
*/
*/
...
@@ -486,15 +486,20 @@ endfunc enable_vfp
...
@@ -486,15 +486,20 @@ endfunc enable_vfp
*
arguments
(
which
is
usually
the
limits
of
the
relocable
BL
image
)
.
*
arguments
(
which
is
usually
the
limits
of
the
relocable
BL
image
)
.
*
x0
-
the
start
of
the
fixup
region
*
x0
-
the
start
of
the
fixup
region
*
x1
-
the
limit
of
the
fixup
region
*
x1
-
the
limit
of
the
fixup
region
*
These
addresses
have
to
be
page
(
4
KB
aligned
)
.
*
These
addresses
have
to
be
4
KB
page
aligned
.
*
---------------------------------------------------------------------------
*
---------------------------------------------------------------------------
*/
*/
/*
Relocation
codes
*/
#define R_AARCH64_NONE 0
#define R_AARCH64_RELATIVE 1027
func
fixup_gdt_reloc
func
fixup_gdt_reloc
mov
x6
,
x0
mov
x6
,
x0
mov
x7
,
x1
mov
x7
,
x1
/
*
Test
if
the
limits
are
4
K
aligned
*/
#if ENABLE_ASSERTIONS
#if ENABLE_ASSERTIONS
/
*
Test
if
the
limits
are
4
KB
aligned
*/
orr
x0
,
x0
,
x1
orr
x0
,
x0
,
x1
tst
x0
,
#(
PAGE_SIZE_MASK
)
tst
x0
,
#(
PAGE_SIZE_MASK
)
ASM_ASSERT
(
eq
)
ASM_ASSERT
(
eq
)
...
@@ -505,7 +510,8 @@ func fixup_gdt_reloc
...
@@ -505,7 +510,8 @@ func fixup_gdt_reloc
*
fixup
region
.
*
fixup
region
.
*/
*/
and
x2
,
x30
,
#
~
(
PAGE_SIZE_MASK
)
and
x2
,
x30
,
#
~
(
PAGE_SIZE_MASK
)
sub
x0
,
x2
,
x6
/*
Diff
(
S
)
=
Current
Address
-
Compiled
Address
*/
subs
x0
,
x2
,
x6
/*
Diff
(
S
)
=
Current
Address
-
Compiled
Address
*/
b.eq
3
f
/*
Diff
(
S
)
=
0
.
No
relocation
needed
*/
adrp
x1
,
__GOT_START__
adrp
x1
,
__GOT_START__
add
x1
,
x1
,
:
lo12
:
__GOT_START__
add
x1
,
x1
,
:
lo12
:
__GOT_START__
...
@@ -518,31 +524,32 @@ func fixup_gdt_reloc
...
@@ -518,31 +524,32 @@ func fixup_gdt_reloc
*
The
new_addr
is
the
address
currently
the
binary
is
executing
from
*
The
new_addr
is
the
address
currently
the
binary
is
executing
from
*
and
old_addr
is
the
address
at
compile
time
.
*
and
old_addr
is
the
address
at
compile
time
.
*/
*/
1
:
1
:
ldr
x3
,
[
x1
]
ldr
x3
,
[
x1
]
/
*
Skip
adding
offset
if
address
is
<
lower
limit
*/
/
*
Skip
adding
offset
if
address
is
<
lower
limit
*/
cmp
x3
,
x6
cmp
x3
,
x6
b.lo
2
f
b.lo
2
f
/
*
Skip
adding
offset
if
address
is
>=
upper
limit
*/
/
*
Skip
adding
offset
if
address
is
>=
upper
limit
*/
cmp
x3
,
x7
cmp
x3
,
x7
b.
ge
2
f
b.
hs
2
f
add
x3
,
x3
,
x0
add
x3
,
x3
,
x0
str
x3
,
[
x1
]
str
x3
,
[
x1
]
2
:
add
x1
,
x1
,
#
8
2
:
add
x1
,
x1
,
#
8
cmp
x1
,
x2
cmp
x1
,
x2
b.lo
1
b
b.lo
1
b
/
*
Starting
dynamic
relocations
.
Use
adrp
/
adr
to
get
RELA_START
and
END
*/
/
*
Starting
dynamic
relocations
.
Use
adrp
/
adr
to
get
RELA_START
and
END
*/
adrp
x1
,
__RELA_START__
3
:
adrp
x1
,
__RELA_START__
add
x1
,
x1
,
:
lo12
:
__RELA_START__
add
x1
,
x1
,
:
lo12
:
__RELA_START__
adrp
x2
,
__RELA_END__
adrp
x2
,
__RELA_END__
add
x2
,
x2
,
:
lo12
:
__RELA_END__
add
x2
,
x2
,
:
lo12
:
__RELA_END__
/
*
/
*
*
According
to
ELF
-
64
specification
,
the
RELA
data
structure
is
as
*
According
to
ELF
-
64
specification
,
the
RELA
data
structure
is
as
*
follows
:
*
follows
:
*
typedef
struct
*
typedef
struct
{
*
{
*
Elf64_Addr
r_offset
;
*
Elf64_Addr
r_offset
;
*
Elf64_Xword
r_info
;
*
Elf64_Xword
r_info
;
*
Elf64_Sxword
r_addend
;
*
Elf64_Sxword
r_addend
;
...
@@ -550,16 +557,19 @@ func fixup_gdt_reloc
...
@@ -550,16 +557,19 @@ func fixup_gdt_reloc
*
*
*
r_offset
is
address
of
reference
*
r_offset
is
address
of
reference
*
r_info
is
symbol
index
and
type
of
relocation
(
in
this
case
*
r_info
is
symbol
index
and
type
of
relocation
(
in
this
case
*
0x403
which
corresponds
to
R_AARCH64_RELATIVE
)
.
*
code
1027
which
corresponds
to
R_AARCH64_RELATIVE
)
.
*
r_addend
is
constant
part
of
expression
.
*
r_addend
is
constant
part
of
expression
.
*
*
*
Size
of
Elf64_Rela
structure
is
24
bytes
.
*
Size
of
Elf64_Rela
structure
is
24
bytes
.
*/
*/
1
:
/
*
Assert
that
the
relocation
type
is
R_AARCH64_RELATIVE
*/
/
*
Skip
R_AARCH64_NONE
entry
with
code
0
*/
1
:
ldr
x3
,
[
x1
,
#
8
]
cbz
x3
,
2
f
#if ENABLE_ASSERTIONS
#if ENABLE_ASSERTIONS
ldr
x3
,
[
x1
,
#
8
]
/
*
Assert
that
the
relocation
type
is
R_AARCH64_RELATIVE
*/
cmp
x3
,
#
0x403
cmp
x3
,
#
R_AARCH64_RELATIVE
ASM_ASSERT
(
eq
)
ASM_ASSERT
(
eq
)
#endif
#endif
ldr
x3
,
[
x1
]
/*
r_offset
*/
ldr
x3
,
[
x1
]
/*
r_offset
*/
...
@@ -569,9 +579,10 @@ func fixup_gdt_reloc
...
@@ -569,9 +579,10 @@ func fixup_gdt_reloc
/
*
Skip
adding
offset
if
r_addend
is
<
lower
limit
*/
/
*
Skip
adding
offset
if
r_addend
is
<
lower
limit
*/
cmp
x4
,
x6
cmp
x4
,
x6
b.lo
2
f
b.lo
2
f
/
*
Skip
adding
offset
if
r_addend
entry
is
>=
upper
limit
*/
/
*
Skip
adding
offset
if
r_addend
entry
is
>=
upper
limit
*/
cmp
x4
,
x7
cmp
x4
,
x7
b.
ge
2
f
b.
hs
2
f
add
x4
,
x0
,
x4
/*
Diff
(
S
)
+
r_addend
*/
add
x4
,
x0
,
x4
/*
Diff
(
S
)
+
r_addend
*/
str
x4
,
[
x3
]
str
x4
,
[
x3
]
...
@@ -579,6 +590,5 @@ func fixup_gdt_reloc
...
@@ -579,6 +590,5 @@ func fixup_gdt_reloc
2
:
add
x1
,
x1
,
#
24
2
:
add
x1
,
x1
,
#
24
cmp
x1
,
x2
cmp
x1
,
x2
b.lo
1
b
b.lo
1
b
ret
ret
endfunc
fixup_gdt_reloc
endfunc
fixup_gdt_reloc
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