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adam.huang
Arm Trusted Firmware
Commits
f95dfc27
Commit
f95dfc27
authored
May 15, 2020
by
Manish Pandey
Committed by
TrustedFirmware Code Review
May 15, 2020
Browse files
Merge "Tegra: introduce support for SMCCC_ARCH_SOC_ID" into integration
parents
f0fea132
b5b2923d
Changes
2
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plat/nvidia/tegra/common/tegra_platform.c
View file @
f95dfc27
/*
/*
* Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2020, NVIDIA Corporation. All rights reserved.
*
*
* SPDX-License-Identifier: BSD-3-Clause
* SPDX-License-Identifier: BSD-3-Clause
*/
*/
...
@@ -259,3 +260,29 @@ bool tegra_platform_is_virt_dev_kit(void)
...
@@ -259,3 +260,29 @@ bool tegra_platform_is_virt_dev_kit(void)
{
{
return
((
tegra_get_platform
()
==
TEGRA_PLATFORM_VIRT_DEV_KIT
)
?
true
:
false
);
return
((
tegra_get_platform
()
==
TEGRA_PLATFORM_VIRT_DEV_KIT
)
?
true
:
false
);
}
}
/*
* This function returns soc version which mainly consist of below fields
*
* soc_version[30:24] = JEP-106 continuation code for the SiP
* soc_version[23:16] = JEP-106 identification code with parity bit for the SiP
* soc_version[0:15] = chip identification
*/
int32_t
plat_get_soc_version
(
void
)
{
uint32_t
chip_id
=
((
tegra_get_chipid
()
>>
CHIP_ID_SHIFT
)
&
CHIP_ID_MASK
);
uint32_t
manfid
=
(
JEDEC_NVIDIA_BKID
<<
24
)
|
(
JEDEC_NVIDIA_MFID
<<
16
);
return
(
int32_t
)(
manfid
|
(
chip_id
&
0xFFFF
));
}
/*
* This function returns soc revision in below format
*
* soc_revision[8:15] = major version number
* soc_revision[0:7] = minor version number
*/
int32_t
plat_get_soc_revision
(
void
)
{
return
(
int32_t
)((
tegra_get_chipid_major
()
<<
8
)
|
tegra_get_chipid_minor
());
}
plat/nvidia/tegra/include/tegra_platform.h
View file @
f95dfc27
/*
/*
* Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2020, NVIDIA Corporation. All rights reserved.
*
*
* SPDX-License-Identifier: BSD-3-Clause
* SPDX-License-Identifier: BSD-3-Clause
*/
*/
...
@@ -30,6 +31,12 @@
...
@@ -30,6 +31,12 @@
#define TEGRA_CHIPID_TEGRA21 U(0x21)
#define TEGRA_CHIPID_TEGRA21 U(0x21)
#define TEGRA_CHIPID_TEGRA18 U(0x18)
#define TEGRA_CHIPID_TEGRA18 U(0x18)
/*******************************************************************************
* JEDEC Standard Manufacturer's Identification Code and Bank ID
******************************************************************************/
#define JEDEC_NVIDIA_MFID U(0x6B)
#define JEDEC_NVIDIA_BKID U(3)
#ifndef __ASSEMBLER__
#ifndef __ASSEMBLER__
/*
/*
...
...
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