Commit fcb52dbf authored by Roberto Vargas's avatar Roberto Vargas
Browse files

cci: Use dsb to wait before reading status register


The CCI500 TRM explicitily requires completion of the write
operation before the read operation, and it is not guaranteed
by dmb but it is dsb.

Change-Id: Ieeaa0d1a4b8fcb87108dea9b6de03d9c8a150829
Signed-off-by: default avatarRoberto Vargas <roberto.vargas@arm.com>
Showing with 2 additions and 2 deletions
+2 -2
......@@ -147,7 +147,7 @@ void cci_enable_snoop_dvm_reqs(unsigned int master_id)
* Wait for the completion of the write to the Snoop Control Register
* before testing the change_pending bit
*/
dmbish();
dsbish();
/* Wait for the dust to settle down */
while (mmio_read_32(cci_base + STATUS_REG) & CHANGE_PENDING_BIT)
......@@ -174,7 +174,7 @@ void cci_disable_snoop_dvm_reqs(unsigned int master_id)
* Wait for the completion of the write to the Snoop Control Register
* before testing the change_pending bit
*/
dmbish();
dsbish();
/* Wait for the dust to settle down */
while (mmio_read_32(cci_base + STATUS_REG) & CHANGE_PENDING_BIT)
......
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