- 02 Dec, 2020 2 commits
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Alexei Fedorov authored
This patch provides the following changes: - Adds definition for FEAT_MTE3 value in ID_AA64PFR1_EL1 register - Enables Memory Tagging Extension for FEAT_MTE3. Change-Id: I735988575466fdc083892ec12c1aee89b5faa472 Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
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Manish Pandey authored
Merge "Add myself and Venkatesh Yadav Abbarapu as code owners for Xilinx platforms" into integration
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- 01 Dec, 2020 1 commit
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Lauren Wehrmeister authored
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- 30 Nov, 2020 2 commits
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Javier Almansa Sobrino authored
Enable basic support for Neoverse-N2 CPUs. Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com> Change-Id: I498adc2d9fc61ac6e1af8ece131039410872e8ad
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Manish Pandey authored
* changes: zynqmp: pm: update error codes to match Linux and PMU Firmware zynqmp: pm: Filter errors related to clock gate permissions
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- 27 Nov, 2020 1 commit
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Manish Pandey authored
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- 24 Nov, 2020 1 commit
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Manish Pandey authored
* changes: fdts: Add VirtIO network device to Morello FVP fdts: Remove "virtio-rng" from Morello FVP
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- 23 Nov, 2020 3 commits
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Manish Pandey authored
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Jessica Clarke authored
Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com> Change-Id: I5ad5290925f637b94168b507b3dcbdd5e1b82e5a
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Jessica Clarke authored
This is not a standard string that any kernel recognises, nor do any of the FDTs embedded in kernels specify this, nor does QEMU's virt machine. Whilst its presence does no harm, it's not a thing code should consult as a result, and so drop it in order to not cause confusion and risk incorrect code being written to search for it. Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com> Change-Id: Iea3214a23181c54e600cf8f4f12dfc822140c23d
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- 20 Nov, 2020 3 commits
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Madhukar Pappireddy authored
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Manish Pandey authored
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Tanmay Jagdale authored
Include libraries needed to emulate Cortex-A72 on sbsa-ref target of QEMU. Signed-off-by: Tanmay Jagdale <tanmay.jagdale@linaro.org> Change-Id: I98cf17b1662c70898977a841af07e07b5cfca8ba
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- 19 Nov, 2020 9 commits
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Manish V Badarkhe authored
Renamed SMC API from "plat_smccc_feature_available" to "plat_is_smccc_feature_available" as per the current implementation. Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Change-Id: Ib0fa400816fba61039c2029a9e127501a6a36811
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Saurabh Gorecha authored
renamed smcc api with correct name plat_is_smccc_feature_available Change-Id: I277ece02bffc2caa065256576c1a047dfcde1c92 Signed-off-by: Saurabh Gorecha <sgorecha@codeaurora.org>
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Manish Pandey authored
* changes: docs: marvell: Update build documentation to reflect mrvl_bootimage and mrvl_flash changes plat: marvell: armada: Add new target mrvl_bootimage plat: marvell: armada: a3k: Add support for building $(DOIMAGETOOL)
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Pali Rohár authored
Also add example how to build TF-A for A3720 Turris MOX board and also fix style/indentation issues and information about default values. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I2dc957307b1b627b403a8d960e85f5ac9e15aee5
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Pali Rohár authored
This new target builds boot-image.bin binary as described in documentation. This image does not contain WTMI image and therefore WTP repository is not required for building. Having ability to build just this boot-image.bin binary without full flash-image.bin is useful for A3720 Turris MOX board which does not use Marvell's WTP and a3700_utils. To reduce duplicity between a8k and a3k code, define this new target and also definitions for $(BUILD_PLAT)/$(BOOT_IMAGE) in common include file marvell_common.mk. For this purpose it is needed to include plat/marvell/marvell.mk file from a3700_common.mk unconditionally (and not only when WTP is defined). Now when common file plat/marvell/marvell.mk does not contain definition for building $(DOIMAGETOOL), it is possible to move its inclusion at the top of the a3700_common.mk file. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: Ic58303b37a1601be9a06ff83b7a279cb7cfc8280
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Pali Rohár authored
Current binary wtptp/linux/tbb_linux which is specified in $(DOIMAGETOOL) variable points to external pre-compiled Marvell x86_64 ELF linux binary from A3700-utils-marvell WTP repository. It means that currently it is not possible to compile TF-A for A3720 on other host platform then linux x86_64. Part of the A3700-utils-marvell WTP repository is also source code of $(DOIMAGETOOL) TBB_Linux tool. This change adds support for building $(DOIMAGETOOL) also for a3k platform. After running $(MAKE) at appropriate subdirectory of A3700-utils-marvell WTP repository, compiled TBB_linux tool will appear in WTP subdirectory wtptp/src/TBB_Linux/release/. So update also $(DOIMAGETOOL) variable to point to the correct location where TBB_linux was built. To build TBB_linux it is required to compile external Crypto++ library which is available at: https://github.com/weidai11/cryptopp.git User needs to set CRYPTOPP_PATH option to specify path to that library. After this change it is now possible to build whole firmware for A3720 platform without requirement to use pre-compiled/proprietary x86_64 executable binaries from Marvell. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I6f26bd4356778a2f8f730a223067a2e550e6c8e0
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Madhukar Pappireddy authored
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Madhukar Pappireddy authored
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Madhukar Pappireddy authored
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- 18 Nov, 2020 1 commit
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Madhukar Pappireddy authored
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- 17 Nov, 2020 4 commits
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Manish Pandey authored
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Manish V Badarkhe authored
Updated the minor version to '4' to indicate 2.4 release Change-Id: Ib142fa15baeb43025fae371c7649199b8121c18f Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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Joanna Farley authored
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Chris Kay authored
Change-Id: I67c9db2fc6d4b83fec2d001745b9305102d4a2ae Signed-off-by: Chris Kay <chris.kay@arm.com>
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- 13 Nov, 2020 1 commit
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Alexei Fedorov authored
This patch fixes the following compilation error reported by aarch64-none-elf-gcc 11.0.0: bl32/tsp/tsp_main.c: In function 'tsp_smc_handler': bl32/tsp/tsp_main.c:393:9: error: 'tsp_get_magic' accessing 32 bytes in a region of size 16 [-Werror=stringop-overflow=] 393 | tsp_get_magic(service_args); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~ bl32/tsp/tsp_main.c:393:9: note: referencing argument 1 of type 'uint64_t *' {aka 'long long unsigned int *'} In file included from bl32/tsp/tsp_main.c:19: bl32/tsp/tsp_private.h:64:6: note: in a call to function 'tsp_get_magic' 64 | void tsp_get_magic(uint64_t args[4]); | ^~~~~~~~~~~~~ by changing declaration of tsp_get_magic function from void tsp_get_magic(uint64_t args[4]); to uint128_t tsp_get_magic(void); which returns arguments directly in x0 and x1 registers. In bl32\tsp\tsp_main.c the current tsp_smc_handler() implementation calls tsp_get_magic(service_args); , where service_args array is declared as uint64_t service_args[2]; and tsp_get_magic() in bl32\tsp\aarch64\tsp_request.S copies only 2 registers in output buffer: /* Store returned arguments to the array */ stp x0, x1, [x4, #0] Change-Id: Ib34759fc5d7bb803e6c734540d91ea278270b330 Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
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- 12 Nov, 2020 6 commits
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johpow01 authored
This errata workaround did not work as intended and was revised in subsequent SDEN releases so we are reverting this change. This is the patch being reverted: https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/4686 Signed-off-by: John Powell <john.powell@arm.com> Change-Id: I8554c75d7217331c7effd781b5f7f49b781bbebe
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johpow01 authored
This errata workaround did not work as intended and was revised in subsequent SDEN releases so we are reverting this change. This is the patch being reverted: https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/4684 Signed-off-by: John Powell <john.powell@arm.com> Change-Id: I560749a5b55e22fbe49d3f428a8b9545d6bdaaf0
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David Horstmann authored
Fix a number of typos and misspellings in TF-A documentation and comments. Signed-off-by: David Horstmann <david.horstmann@arm.com> Change-Id: I34c5a28c3af15f28d1ccada4d9866aee6af136ee
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Michal Simek authored
Jolly left the company and Siva (DP) has moved to different possition that's why it is necessary to change code ownership. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Change-Id: I546d9a0f7a2abd0c7a65be807725bc609160f3b2
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Davorin Mista authored
All EEMI error codes start with value 2000. Note: Legacy error codes ARGS (=1) and NOTSUPPORTED (=4) returned by current ATF code have been left in place. Signed-off-by: Davorin Mista <davorin.mista@aggios.com> Acked-by: Will Wong <WILLW@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Change-Id: I939afa85957cac88025d82a80f9f6dd49be993b6
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Mirela Simonovic authored
Linux clock framework cannot properly deal with these errors. When the error is related to the lack of permissions to control the clock we filter the error and report the success to linux. Before recent changes in clock framework across the stack, this was done in the PMU-FW as a workaround. Since the PMU-FW now handles clocks and the permissions to control them using general principles rather than workarounds, it can no longer distinguish such exceptions and it has to return no-access error. Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com> Acked-by: Will Wong <WILLW@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Change-Id: I1491a80e472f44e322a542b29a20eb1cb3319802
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- 09 Nov, 2020 2 commits
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Manish Pandey authored
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Manish V Badarkhe authored
Provide missed command line parameters such as KEY_ALG, HASH_ALG and KEY_SIZE while generating the FWU certificate. Signed-off-by: Gilad Ben Yossef <Gilad.BenYossef@arm.com> Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Change-Id: I017fa3fff844f4262ae2441cbc9fee909d357fb3
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- 29 Oct, 2020 2 commits
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Alexei Fedorov authored
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Manish Pandey authored
* changes: intel: common: Fix non-MISRA compliant code v2 intel: mailbox: Fix non-MISRA compliant code intel: mailbox: Mailbox error recovery handling intel: mailbox: Enable sending large mailbox command intel: mailbox: Use retry count in mailbox poll intel: mailbox: Ensure time out duration is predictive intel: mailbox: Read mailbox response even there is an error intel: mailbox: Driver now handles larger response intel: common: Change how mailbox handles job id & buffer intel: common: Improve readability of mailbox read response intel: SIP: increase FPGA_CONFIG_SIZE to 32 MB intel: common: Remove urgent from mailbox async intel: common: Improve mailbox driver readability
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- 28 Oct, 2020 2 commits
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David Horstmann authored
Currently, when RECLAIM_INIT_CODE is set, the stacks are scaled to ensure that the entirety of the init section can be reclaimed as stack. This causes an issue in lib/psci/aarch64/psci_helpers.S, where the stack size is used for cache operations in psci_do_pwrdown_cache_maintenance(). If the stacks are scaled, then the PSCI code may fail to invalidate some of the stack memory before power down. Resizing stacks is also not good for stability in general, since code that works with a small number of cores may overflow the stack when the number of cores is increased. Change to make every stack be PLATFORM_STACK_SIZE big, and allow the total stack to be smaller than the init section. Any pages of the init section not reclaimed as stack will be set to read-only and execute-never, for security. Change-Id: I10b3884981006431f2fcbec3864c81d4a8c246e8 Signed-off-by: David Horstmann <david.horstmann@arm.com>
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André Przywara authored
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