- 21 Apr, 2016 5 commits
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Sandrine Bailleux authored
Change-Id: Icaacd19c4cef9c10d02adcc2f84a4d7c97d4bcfa
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Sandrine Bailleux authored
Change-Id: Ia2ce8aa752efb090cfc734c1895c8f2539e82439
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Sandrine Bailleux authored
Change-Id: I632a8c5bb517ff89c69268e865be33101059be7d
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Sandrine Bailleux authored
Change-Id: I45641551474f4c58c638aff8c42c0ab9a8ec78b4
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Sandrine Bailleux authored
The CPU errata build flags don't enable errata, they enable errata workarounds. Change-Id: Ica65689d1205fc54eee9081a73442144b973400f
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- 08 Feb, 2016 1 commit
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Sandrine Bailleux authored
The LDNP/STNP instructions as implemented on Cortex-A53 and Cortex-A57 do not behave in a way most programmers expect, and will most probably result in a significant speed degradation to any code that employs them. The ARMv8-A architecture (see Document ARM DDI 0487A.h, section D3.4.3) allows cores to ignore the non-temporal hint and treat LDNP/STNP as LDP/STP instead. This patch introduces 2 new build flags: A53_DISABLE_NON_TEMPORAL_HINT and A57_DISABLE_NON_TEMPORAL_HINT to enforce this behaviour on Cortex-A53 and Cortex-A57. They are enabled by default. The string printed in debug builds when a specific CPU errata workaround is compiled in but skipped at runtime has been generalised, so that it can be reused for the non-temporal hint use case as well. Change-Id: I3e354f4797fd5d3959872a678e160322b13867a1
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- 05 Aug, 2015 1 commit
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Jimmy Huang authored
- Apply a53 errata #826319 to revision <= r0p2 - Apply a53 errata #836870 to revision <= r0p3 - Update docs/cpu-specific-build-macros.md for newly added errata build flags Change-Id: I44918e36b47dca1fa29695b68700ff9bf888865e Signed-off-by: Jimmy Huang <jimmy.huang@mediatek.com>
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- 29 Oct, 2014 1 commit
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Soby Mathew authored
This patch optimizes the Cortex-A57 cluster power down sequence by not flushing the Level1 data cache. The L1 data cache and the L2 unified cache are inclusive. A flush of the L2 by set/way flushes any dirty lines from the L1 as well. This is a known safe deviation from the Cortex-A57 TRM defined power down sequence. This optimization can be enabled by the platform through the 'SKIP_A57_L1_FLUSH_PWR_DWN' build flag. Each Cortex-A57 based platform must make its own decision on whether to use the optimization. This patch also renames the cpu-errata-workarounds.md to cpu-specific-build-macros.md as this facilitates documentation of both CPU Specific errata and CPU Specific Optimization build macros. Change-Id: I299b9fe79e9a7e08e8a0dffb7d345f9a00a71480
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- 20 Aug, 2014 1 commit
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Soby Mathew authored
This patch adds workarounds for selected errata which affect the Cortex-A57 r0p0 part. Each workaround has a build time flag which should be used by the platform port to enable or disable the corresponding workaround. The workarounds are disabled by default. An assertion is raised if the platform enables a workaround which does not match the CPU revision at runtime. Change-Id: I9ae96b01c6ff733d04dc733bd4e67dbf77b29fb0
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- 20 Feb, 2014 1 commit
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Jeenu Viswambharan authored
At present the fip.bin depends on phony targets for BL images, resulting in unconditional remake of fip.bin. Also the build messages doesn't match with the rest of build system. This patch modifies the fip.bin dependencies to the actual BL binary images so that fip.bin is remade only when the component images are rebuilt/modified. The build messages and FIP Makefile are modified to match the style of rest of the build system. Change-Id: I8dd08666ff766d106820a5b4b037c2161bcf140f
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- 17 Feb, 2014 1 commit
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Harry Liebel authored
This tool can be used to create a Firmware Image Packages (FIP). These FIPs store a combined set of firmware images with a Table of Contents (ToC) that can be loaded by the firmware from platform storage. - Add uuid.h from FreeBSD. - Use symbolic links to shared headers otherwise unwanted headers and definitions are pulled in. - A FIP is created as part of the default FVP build. - A BL3-3 image(e.g. UEFI) must be provided. Change-Id: Ib73feee181df2dba68bf6abec115a83cfa5e26cb
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- 20 Jan, 2014 2 commits
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Ryan Harkin authored
Tidy up the spacing of variable definitions within the makefiles to make them more consistent, easier to read and amend. Change-Id: Ic6d7c8489ca4330824abb5cd1ead8f1d449d1a85 Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
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Ryan Harkin authored
Move all explicit platform or architecture specific references into a new platform.mk file that is defined for each platform. Change-Id: I9d6320d1ba957e0cc8d9b316b3578132331fa428 Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
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- 17 Jan, 2014 1 commit
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Dan Handley authored
Change-Id: Ic7fb61aabae1d515b9e6baf3dd003807ff42da60
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- 20 Dec, 2013 1 commit
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Harry Liebel authored
- This change is split into two separate patches in order to simplify the history as interpreted by 'git'. The split is between the move/rename and addition of new files. - Remove dependency on toolchain C library headers and functions in order to ensure behavioural compatibility between toolchains. - Use FreeBSD as reference for C library implementation. - Do not let GCC use default library include paths. - Remove unused definitions in modified headers and implementations. - Move C library files to 'lib/stdlib' and 'include/stdlib'. - Break std.c functions out into separate files. Change-Id: I91cddfb3229775f770ad781589670c57d347a154
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- 05 Dec, 2013 1 commit
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Dan Handley authored
- Add instructions for contributing to ARM Trusted Firmware. - Update copyright text in all files to acknowledge contributors. Change-Id: I9311aac81b00c6c167d2f8c889aea403b84450e5
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- 25 Oct, 2013 1 commit
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Achin Gupta authored
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