- 06 Jun, 2019 1 commit
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Ambroise Vincent authored
Change-Id: I0d9dbef7041fcf950bcafcdbbc17c72b4dea9e40 Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
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- 03 Jun, 2019 3 commits
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John Tsichritzis authored
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John Tsichritzis authored
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John Tsichritzis authored
Change-Id: I41ce5323c33a81db13c5cc40de1ac4e221a10cd8 Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
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- 31 May, 2019 2 commits
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Paul Beesley authored
* changes: Removing IRC related info from the documentation Further fixes to documentation links
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John Tsichritzis authored
Change-Id: I5cf8c70a304bf5869cbeb12fa8d39171cff48ebd Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
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- 30 May, 2019 3 commits
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Paul Beesley authored
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Paul Beesley authored
Automatic labelling of document titles is a prerequisite for converting the format of cross-document links. Sphinx will generate (via the enabled extension) a hidden link target for each document title and this can be referred to later, from another page, to link to the target. The plugin options being used require Sphinx >= 2.0.0 so a requirements.txt file has been added. This file is used with the pip package manager for Python so that the correct dependencies are installed. Change-Id: Ic2049db5804aa4a6447608ba4299de958ce0a87d Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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John Tsichritzis authored
Change-Id: Ib021c721652d96f6c06ea18741f19a72bba1d00f Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
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- 29 May, 2019 4 commits
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Paul Beesley authored
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Heiko Stuebner authored
In the rockchip bl31 setup the __RO_START__ and __RO_END__ symbols are currently imported into special BL31_RO_* constants while the general code also imports them as BL_CODE_BASE and BL_CODE_END. So we can just use the general symbols and can drop the duplication. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Change-Id: Ibf1b48ad80bed897247a1690a32711030479262d
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Paul Beesley authored
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Paul Beesley authored
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- 28 May, 2019 5 commits
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Ambroise Vincent authored
The workaround is added to the Cortex-A55 cpu specific file. The workaround is disabled by default and have to be explicitly enabled by the platform integrator. Change-Id: I3e6fd10df6444122a8ee7d08058946ff1cc912f8 Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
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Soby Mathew authored
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Soby Mathew authored
* changes: ti: k3: common: Set L2 latency on A72 cores ti: k3: common: Add support for J721E
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John Tsichritzis authored
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John Tsichritzis authored
Change-Id: Ic09e74f22b43fba51ee17cd02b5e1dc5d8e0bb63 Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
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- 24 May, 2019 7 commits
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Paul Beesley authored
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Paul Beesley authored
* changes: Docs fixes Update security documentation
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Alexei Fedorov authored
This patch adds the functionality needed for platforms to provide Branch Target Identification (BTI) extension, introduced to AArch64 in Armv8.5-A by adding BTI instruction used to mark valid targets for indirect branches. The patch sets new GP bit [50] to the stage 1 Translation Table Block and Page entries to denote guarded EL3 code pages which will cause processor to trap instructions in protected pages trying to perform an indirect branch to any instruction other than BTI. BTI feature is selected by BRANCH_PROTECTION option which supersedes the previous ENABLE_PAUTH used for Armv8.3-A Pointer Authentication and is disabled by default. Enabling BTI requires compiler support and was tested with GCC versions 9.0.0, 9.0.1 and 10.0.0. The assembly macros and helpers are modified to accommodate the BTI instruction. This is an experimental feature. Note. The previous ENABLE_PAUTH build option to enable PAuth in EL3 is now made as an internal flag and BRANCH_PROTECTION flag should be used instead to enable Pointer Authentication. Note. USE_LIBROM=1 option is currently not supported. Change-Id: Ifaf4438609b16647dc79468b70cd1f47a623362e Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
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Ambroise Vincent authored
The flags are taken from the different warning levels of the build system when they do not generate any error with the current upstreamed platforms. Change-Id: Ia70cff83bedefb6d2f0dd266394ef77fe47e7f65 Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
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John Tsichritzis authored
1) Fix links in "about" page 2) Put back the "contents" page with adjusted links Change-Id: Id09140b91df5cf0a275149801d05d8cfeeda1c6e Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
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John Tsichritzis authored
1) Replace references to "Arm Trusted Firmware" with "TF-A" 2) Update issue tracker link Change-Id: I12d827d49f6cc34e46936d7f7ccf44e32b26a0bd Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
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John Tsichritzis authored
Changes to make the help text a bit more readable: 1) The "usage" part is now a one-liner 2) The supported platforms list is printed separately Change-Id: I93e48a6cf1d28f0ef9f3db16ce17725e4dff33c9 Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
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- 23 May, 2019 4 commits
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Sandrine Bailleux authored
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Sandrine Bailleux authored
* changes: doc: Use proper note and warning annotations doc: Refactor contributor acknowledgements doc: Reorganise images and update links doc: Set correct syntax highlighting style doc: Add minimal glossary doc: Remove per-page contents lists doc: Make checkpatch ignore rst files doc: Format security advisory titles and headings doc: Reformat platform port documents doc: Normalise section numbering and headings doc: Reword document titles
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Sandrine Bailleux authored
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Masahisa Kojima authored
Payload length of the get dram mapping information message is 0. The mbx_mem->len parameter should be 4, it only contains message header. Fixes: b67d2029 ("plat/synquacer: enable SCMI support") Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Change-Id: If1cd4c855da2dc5dc4b6da3bea152b8441971de7
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- 22 May, 2019 11 commits
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Andrew F. Davis authored
The Cortex-A72 based cores on K3 platforms can be clocked fast enough that an extra latency cycle is needed to ensure correct L2 access. Set the latency here for all A72 cores. Signed-off-by: Andrew F. Davis <afd@ti.com> Change-Id: Id534316dec1c1f326908efbfd964f219cda7386a
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Nishanth Menon authored
Enable Cortex-A72 support for J721E. Change-Id: I5bea5fb6ec45d1a9f8f2192d42da2cc03ae0f7ec Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Andrew F. Davis <afd@ti.com>
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Paul Beesley authored
The documentation contains plenty of notes and warnings. Enable special rendering of these blocks by converting the note prefix into a .. note:: annotation. Change-Id: I34e26ca6bf313d335672ab6c2645741900338822 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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Paul Beesley authored
- Make the list of contributors into an actual list - Use note syntax for the note - Remove the Individuals heading since there are none This file could be considered for removal as it is a legacy document, as its note explains. Change-Id: Idf984bc192af7a0ec367a6642ab99ccccf5df1a8 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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Paul Beesley authored
Change-Id: I679d1499376a524bef1cfc33df995b0a719b5ac8 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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Paul Beesley authored
Several code blocks do not specify a language for syntax highlighting. This results in Sphinx using a default highlighter which is Python. This patch adds the correct language to each code block that doesn't already specify it. Change-Id: Icce1949aabfdc11a334a42d49edf55fa673cddc3 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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Paul Beesley authored
One of the current issues with the documentation is that terms and abbreviations are frequently redefined. For example, we might have a sentence like "... the SCP (System Control Processor) will ...". These definitions might be repeated several times across pages, or even within the same document. Equally, some of these abbreviations are missed and are never expanded. Sphinx provides a :term: keyword that takes some text and, if that text is defined in a glossary document, links to its glossary entry. Using this functionality will prevent repeated definitions and will make the docs more maintainable by using a single definition source. The glossary added in this patch was created from a quick scrub of the source code - there may be missing entries. The SDEI abbreviation was used as an example. Note that a global_substitutions file was created. This file contains the RST 'replace' statements that convert plain text terms into linked terms (by adding the ':term:' keyword to them). An example is: .. |TF-A| replace:: :term:`TF-A` The 'rst_prolog' variable in conf.py is used to inject this list of replacements into each page. Terms must be surrounded with the pipe character to be turned into links - this means that we can still prevent certain terms from being linked if we don't want them to be. Change-Id: I87010ed9cfa4a60011a9b4a431b98cb4bb7baa28 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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Paul Beesley authored
These are no longer needed as there will always be a table of contents rendered to the left of every page. Some of these lists can be quite long and, when opening a page, the reader sees nothing but a huge list of contents! After this patch, the document contents are front-and-centre and the contents are nicely rendered in the sidebar without duplication. Change-Id: I444754d548ec91d00f2b04e861de8dde8856aa62 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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Paul Beesley authored
Previously checkpatch was invoked with options to make it ignore Markdown (md) files as this was the dominant format for TF-A documents. Now that rst is being used everywhere this option needs updating. Change-Id: I59b5a0bcc45d2386df4f880b8d333baef0bbee77 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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Paul Beesley authored
Required so that the advisory documents are all valid RST files (with a header) and that they all integrate into the document tree. Change-Id: I68ca2b0b9e648e24b460deb772c471a38518da26 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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Paul Beesley authored
The platform port documents are not very standardised right now and they don't integrate properly into the document tree so: 1) Make sure each port has a proper name and title (incl. owner) 2) Correct use of headings, subheadings, etc in each port 3) Resolve any naming conflicts between documents Change-Id: I4c2da6f57172b7f2af3512e766ae9ce3b840b50f Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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