- 18 Apr, 2016 1 commit
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Soren Brinkmann authored
The bit mapping in I(E|D|S)R are equal, consolidate the #defines. Signed-off-by:
Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by:
Michal Simek <michal.simek@xilinx.com>
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- 06 Apr, 2016 1 commit
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Soren Brinkmann authored
The Xilinx Zynq UltraScale+ MPSOC containes a quad A53 cluster. This patch adds the platform port for that SoC. Signed-off-by:
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